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Searched refs:CLK_CFG_4_CLR (Results 1 – 2 of 2) sorted by relevance

/drivers/clk/mediatek/
A Dclk-mt6735-topckgen.c28 #define CLK_CFG_4_CLR 0x88 macro
351 …_AUDIO_SEL, "audio_sel", audio_sel_parents, CLK_CFG_4, CLK_CFG_4_SET, CLK_CFG_4_CLR, 0, 2, 7, 0, 0…
352 …, "aud_intbus_sel", aud_intbus_sel_parents, CLK_CFG_4, CLK_CFG_4_SET, CLK_CFG_4_CLR, 8, 2, 15, 0, …
353 …SPI_SEL, "pmicspi_sel", pmicspi_sel_parents, CLK_CFG_4, CLK_CFG_4_SET, CLK_CFG_4_CLR, 16, 3, 0, 0),
354 …LK_TOP_SCP_SEL, "scp_sel", scp_sel_parents, CLK_CFG_4, CLK_CFG_4_SET, CLK_CFG_4_CLR, 24, 2, 31, 0,…
A Dclk-mt6765.c55 #define CLK_CFG_4_CLR 0x88 macro
424 CLK_CFG_4_CLR, 0, 2, 7, CLK_CFG_UPDATE, 16),
426 CLK_CFG_4, CLK_CFG_4_SET, CLK_CFG_4_CLR,
430 CLK_CFG_4_CLR, 16, 2, 23, CLK_CFG_UPDATE, 18),
433 CLK_CFG_4_CLR, 24, 2, 31, CLK_CFG_UPDATE, 19),

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