Searched refs:CON0_RST_BAR (Results 1 – 1 of 1) sorted by relevance
| /drivers/clk/mediatek/ |
| A D | clk-mt6735-apmixedsys.c | 45 #define CON0_RST_BAR BIT(24) macro
70 …PLL(CLK_APMIXED_MAINPLL, "mainpll", MAINPLL_CON0, MAINPLL_PWR_CON0, 0xf0000101, CON0_RST_BAR, MAIN…
71 …PLL(CLK_APMIXED_UNIVPLL, "univpll", UNIVPLL_CON0, UNIVPLL_PWR_CON0, 0xfc000001, CON0_RST_BAR, UNIV…
74 …PLL(CLK_APMIXED_VENCPLL, "vencpll", VENCPLL_CON0, VENCPLL_PWR_CON0, 0x00000001, CON0_RST_BAR, VENC…
|
Completed in 4 milliseconds