| /drivers/gpu/drm/i915/ |
| A D | i915_utils.h | 251 if (COND) { \
266 #define _wait_for(COND, US, Wmin, Wmax) __wait_for(, (COND), (US), (Wmin), \ argument
268 #define wait_for(COND, MS) _wait_for((COND), (MS) * 1000, 10, 1000) argument
277 #define _wait_for_atomic(COND, US, ATOMIC) \ argument
293 if (COND) { \
314 #define wait_for_us(COND, US) \ argument
319 ret__ = _wait_for((COND), (US), 10, 10); \
321 ret__ = _wait_for_atomic((COND), (US), 0); \
325 #define wait_for_atomic_us(COND, US) \ argument
329 _wait_for_atomic((COND), (US), 1); \
[all …]
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| A D | intel_pcode.c | 166 #define COND \ in skl_pcode_request() macro
175 if (COND) { in skl_pcode_request()
179 ret = _wait_for(COND, timeout_base_ms * 1000, 10, 10); in skl_pcode_request()
197 ret = wait_for_atomic(COND, 50); in skl_pcode_request()
203 #undef COND in skl_pcode_request()
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| A D | intel_uncore.c | 2493 #define COND (__raw_uncore_read32(uncore, FORCEWAKE_MT) != ~0) in sanity_check_mmio_access() macro
2494 if (wait_for(COND, 2000) == -ETIMEDOUT) { in sanity_check_mmio_access()
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| /drivers/gpu/drm/msm/disp/mdp4/ |
| A D | mdp4_kms.h | 103 COND(mixer == 1, MDP4_LAYERMIXER_IN_CFG_PIPE0_MIXER1); in mixercfg()
109 COND(mixer == 1, MDP4_LAYERMIXER_IN_CFG_PIPE1_MIXER1); in mixercfg()
115 COND(mixer == 1, MDP4_LAYERMIXER_IN_CFG_PIPE2_MIXER1); in mixercfg()
121 COND(mixer == 1, MDP4_LAYERMIXER_IN_CFG_PIPE3_MIXER1); in mixercfg()
127 COND(mixer == 1, MDP4_LAYERMIXER_IN_CFG_PIPE4_MIXER1); in mixercfg()
133 COND(mixer == 1, MDP4_LAYERMIXER_IN_CFG_PIPE5_MIXER1); in mixercfg()
139 COND(mixer == 1, MDP4_LAYERMIXER_IN_CFG_PIPE6_MIXER1); in mixercfg()
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| A D | mdp4_plane.c | 300 COND(format->alpha_enable, MDP4_PIPE_SRC_FORMAT_ALPHA_ENABLE) | in mdp4_plane_mode_set()
306 COND(format->flags & MSM_FORMAT_FLAG_UNPACK_TIGHT, in mdp4_plane_mode_set()
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| /drivers/gpu/drm/v3d/ |
| A D | v3d_drv.h | 495 #define __wait_for(OP, COND, US, Wmin, Wmax) ({ \ argument
505 if (COND) { \
520 #define _wait_for(COND, US, Wmin, Wmax) __wait_for(, (COND), (US), (Wmin), \ argument
522 #define wait_for(COND, MS) _wait_for((COND), (MS) * 1000, 10, 1000) argument
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| /drivers/gpu/drm/msm/hdmi/ |
| A D | hdmi_audio.c | 84 COND(audio->channels != 2, HDMI_AUDIO_PKT_CTRL2_LAYOUT) | in msm_hdmi_audio_update()
114 COND(enabled, HDMI_AUD_INT_AUD_FIFO_URUN_INT) | in msm_hdmi_audio_update()
115 COND(enabled, HDMI_AUD_INT_AUD_SAM_DROP_INT)); in msm_hdmi_audio_update()
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| /drivers/gpu/drm/vc4/ |
| A D | vc4_drv.h | 874 #define __wait_for(OP, COND, US, Wmin, Wmax) ({ \ argument
884 if (COND) { \
899 #define _wait_for(COND, US, Wmin, Wmax) __wait_for(, (COND), (US), (Wmin), \ argument
901 #define wait_for(COND, MS) _wait_for((COND), (MS) * 1000, 10, 1000) argument
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| /drivers/gpu/drm/gma500/ |
| A D | intel_gmbus.c | 39 #define _wait_for(COND, MS, W) ({ \ argument
42 while (! (COND)) { \
53 #define wait_for(COND, MS) _wait_for(COND, MS, 1) argument
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| A D | cdv_intel_display.c | 113 #define _wait_for(COND, MS, W) ({ \ argument
116 while (!(COND)) { \
127 #define wait_for(COND, MS) _wait_for(COND, MS, 1) argument
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| A D | cdv_intel_dp.c | 233 #define _wait_for(COND, MS, W) ({ \ argument
236 while (! (COND)) { \
246 #define wait_for(COND, MS) _wait_for(COND, MS, 1) argument
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| /drivers/gpu/drm/i915/display/ |
| A D | intel_display_power_well.c | 1132 #define COND \ in vlv_set_power_well() macro
1135 if (COND) in vlv_set_power_well()
1143 if (wait_for(COND, 100)) in vlv_set_power_well()
1149 #undef COND in vlv_set_power_well()
1719 #define COND \ in chv_set_pipe_power_well() macro
1722 if (COND) in chv_set_pipe_power_well()
1730 if (wait_for(COND, 100)) in chv_set_pipe_power_well()
1736 #undef COND in chv_set_pipe_power_well()
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| /drivers/gpu/drm/msm/disp/mdp5/ |
| A D | mdp5_plane.c | 640 COND(yuv, MDP5_PIPE_SCALE_CONFIG_SCALEX_FILTER_COMP_1_2(uv_filter)); in get_scale_config()
645 COND(yuv, MDP5_PIPE_SCALE_CONFIG_SCALEY_FILTER_COMP_1_2(uv_filter)); in get_scale_config()
785 COND(format->alpha_enable, MDP5_PIPE_SRC_FORMAT_ALPHA_ENABLE) | in mdp5_hwpipe_mode_set()
788 COND(format->flags & MSM_FORMAT_FLAG_UNPACK_TIGHT, in mdp5_hwpipe_mode_set()
802 COND(has_pe, MDP5_PIPE_SRC_OP_MODE_SW_PIX_EXT_OVERRIDE) | in mdp5_hwpipe_mode_set()
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| /drivers/gpu/drm/msm/ |
| A D | msm_drv.h | 526 #define COND(bool, val) ((bool) ? (val) : 0) macro
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