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Searched refs:CONFIG (Results 1 – 25 of 36) sorted by relevance

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/drivers/net/wireless/ath/ath9k/
A Dhtc_drv_main.c272 ath_dbg(common, CONFIG, in ath9k_htc_set_channel()
422 ath_dbg(common, CONFIG, in ath9k_htc_add_monitor_interface()
459 ath_dbg(common, CONFIG, in ath9k_htc_remove_monitor_interface()
515 ath_dbg(common, CONFIG, in ath9k_htc_add_station()
519 ath_dbg(common, CONFIG, in ath9k_htc_add_station()
559 ath_dbg(common, CONFIG, in ath9k_htc_remove_station()
563 ath_dbg(common, CONFIG, in ath9k_htc_remove_station()
670 ath_dbg(common, CONFIG, in ath9k_htc_init_rate()
697 ath_dbg(common, CONFIG, in ath9k_htc_update_rate()
921 ath_dbg(common, CONFIG, in ath9k_htc_start()
[all …]
A Dhtc_drv_beacon.c343 ath_dbg(common, CONFIG, "Added interface at beacon slot: %d\n", in ath9k_htc_assign_bslot()
357 ath_dbg(common, CONFIG, "Removed interface at beacon slot: %d\n", in ath9k_htc_remove_bslot()
384 ath_dbg(common, CONFIG, "tsfadjust is: %llu for bslot: %d\n", in ath9k_htc_set_tsfadjust()
415 ath_dbg(common, CONFIG, in ath9k_htc_check_beacon_config()
426 ath_dbg(common, CONFIG, in ath9k_htc_check_beacon_config()
444 ath_dbg(common, CONFIG, in ath9k_htc_check_beacon_config()
485 ath_dbg(common, CONFIG, "Unsupported beaconing mode\n"); in ath9k_htc_beacon_config()
507 ath_dbg(common, CONFIG, "Unsupported beaconing mode\n"); in ath9k_htc_beacon_reconfig()
A Dmain.c663 ath_dbg(common, CONFIG, in ath9k_start()
986 ath_dbg(common, CONFIG, "Driver halt\n"); in ath9k_stop()
1138 ath_dbg(common, CONFIG, in ath9k_set_assoc_state()
1269 ath_dbg(common, CONFIG, in ath9k_calculate_summary_state()
1394 ath_dbg(common, CONFIG, "Change Interface\n"); in ath9k_change_interface()
1421 ath_dbg(common, CONFIG, "Detach Interface\n"); in ath9k_remove_interface()
1531 ath_dbg(common, CONFIG, "Monitor mode is enabled\n"); in ath9k_config()
1657 ath_dbg(common, CONFIG, in ath9k_sta_state()
1662 ath_dbg(common, CONFIG, in ath9k_sta_state()
1739 ath_dbg(common, CONFIG, in ath9k_conf_tx()
[all …]
A Dbeacon.c213 ath_dbg(common, CONFIG, "Added interface at beacon slot: %d\n", in ath9k_beacon_assign_slot()
223 ath_dbg(common, CONFIG, "Removing interface at beacon slot: %d\n", in ath9k_beacon_remove_slot()
289 ath_dbg(common, CONFIG, in ath9k_beacon_ensure_primary_slot()
358 ath_dbg(common, CONFIG, "tsfadjust is: %lld for bslot: %d\n", in ath9k_set_tsfadjust()
715 ath_dbg(common, CONFIG, "Unsupported beaconing mode\n"); in ath9k_set_beacon()
A Dcommon-spectral.c812 ath_dbg(common, CONFIG, "spectral scan: background mode enabled\n"); in write_file_spec_scan_ctl()
815 ath_dbg(common, CONFIG, "spectral scan: channel scan mode enabled\n"); in write_file_spec_scan_ctl()
818 ath_dbg(common, CONFIG, "spectral scan: manual mode enabled\n"); in write_file_spec_scan_ctl()
821 ath_dbg(common, CONFIG, "spectral scan: disabled\n"); in write_file_spec_scan_ctl()
A Dcommon-init.c215 ath_dbg(common, CONFIG, "TX streams %d, RX streams: %d\n", in ath9k_cmn_setup_ht_cap()
A Dinit.c290 ath_dbg(common, CONFIG, "%s DMA: %u buffers %u desc/buf\n", in ath_descdma_setup()
334 ath_dbg(common, CONFIG, "%s DMA map: %p (%u) -> %llx (%u)\n", in ath_descdma_setup()
634 ath_dbg(common, CONFIG, "parsing configuration from OF node\n"); in ath9k_of_init()
/drivers/gpu/drm/xe/
A Dxe_gt_sriov_pf_debugfs.c196 #define DEFINE_SRIOV_GT_CONFIG_DEBUGFS_ATTRIBUTE(CONFIG, TYPE, FORMAT) \ argument
198 static int CONFIG##_set(void *data, u64 val) \
210 xe_gt_sriov_pf_config_set_##CONFIG(gt, vfid, val); \
216 static int CONFIG##_get(void *data, u64 *val) \
221 *val = xe_gt_sriov_pf_config_get_##CONFIG(gt, vfid); \
225 DEFINE_DEBUGFS_ATTRIBUTE(CONFIG##_fops, CONFIG##_get, CONFIG##_set, FORMAT)
/drivers/soc/bcm/brcmstb/pm/
A Dpm-mips.c39 #define CONFIG 6 macro
102 ctx->cp0_regs[CONFIG] = read_c0_brcm_config(); in brcm_pm_save_cp0_context()
125 write_c0_brcm_config(ctx->cp0_regs[CONFIG]); in brcm_pm_restore_cp0_context()
/drivers/net/ethernet/smsc/
A Dsmc9194.c958 configuration_register = inw( ioaddr + CONFIG ); in smc_probe()
1066 outw( inw( ioaddr + CONFIG ) & ~CFG_AUI_SELECT, in smc_open()
1067 ioaddr + CONFIG ); in smc_open()
1070 outw( inw( ioaddr + CONFIG ) | CFG_AUI_SELECT, in smc_open()
1071 ioaddr + CONFIG ); in smc_open()
A Dsmc91c92_cs.c177 #define CONFIG 0 macro
781 s = inb(ioaddr + CONFIG); in check_sig()
786 outb(s, ioaddr + CONFIG); in check_sig()
898 smc->cfg = inw(ioaddr + CONFIG) & ~CFG_AUI_SELECT; in smc91c92_config()
1624 outw(smc->cfg | CFG_AUI_SELECT, ioaddr + CONFIG); in smc_set_xcvr()
1630 outw(smc->cfg, ioaddr + CONFIG); in smc_set_xcvr()
1741 media |= (inw(ioaddr + CONFIG) & CFG_AUI_SELECT) ? 2 : 1; in media_check()
1860 tmp = inw(ioaddr + CONFIG); in smc_netdev_get_ecmd()
A Dsmc9194.h97 #define CONFIG 0 macro
/drivers/thermal/qcom/
A Dtsens-8960.c16 #define CONFIG 0x9b macro
95 ret = regmap_update_bits(map, CONFIG_ADDR, CONFIG_MASK, CONFIG); in resume_8960()
/drivers/media/dvb-frontends/
A Dmt312.c238 ret = mt312_writereg(state, CONFIG, in mt312_initfe()
570 ret = mt312_readreg(state, CONFIG, &config_val); in mt312_set_frontend()
710 ret = mt312_readreg(state, CONFIG, &config); in mt312_sleep()
715 ret = mt312_writereg(state, CONFIG, config & 0x7f); in mt312_sleep()
A Dmt352_priv.h103 CONFIG = 0x8A, enumerator
A Dmt312_priv.h143 CONFIG = 127 enumerator
A Dmt352.c512 (mt352_read_register(state, CONFIG) & 0x20) == 0) { in mt352_init()
/drivers/media/usb/dvb-usb-v2/
A Dec168.h26 CONFIG = 0x01, enumerator
A Dec168.c35 request = CONFIG; in ec168_ctrl_msg()
39 request = CONFIG; in ec168_ctrl_msg()
/drivers/media/pci/dt3155/
A Ddt3155.c165 write_i2c_reg(pd->regs, CONFIG, pd->config); in dt3155_start_streaming()
452 write_i2c_reg(pd->regs, CONFIG, pd->config | PM_LUT_PGM); in dt3155_init_board()
457 write_i2c_reg(pd->regs, CONFIG, pd->config | PM_LUT_PGM | PM_LUT_SEL); in dt3155_init_board()
462 write_i2c_reg(pd->regs, CONFIG, pd->config); /* ACQ_MODE_EVEN */ in dt3155_init_board()
A Ddt3155.h51 #define CONFIG 0x13 macro
/drivers/iommu/arm/arm-smmu-v3/
A Dtegra241-cmdqv.c259 REG_CMDQV(cmdqv, CONFIG), in cmdqv_write_config()
270 REG_VINTF(vintf, CONFIG), in vintf_write_config()
291 REG_VCMDQ_PAGE0(vcmdq, CONFIG), in vcmdq_write_config()
557 writel(regval, REG_VINTF(vintf, CONFIG)); in tegra241_vintf_hw_init()
566 vintf->hyp_own = !!(VINTF_HYP_OWN & readl(REG_VINTF(vintf, CONFIG))); in tegra241_vintf_hw_init()
592 regval = readl_relaxed(REG_CMDQV(cmdqv, CONFIG)); in tegra241_cmdqv_hw_reset()
/drivers/accel/ivpu/
A Divpu_hw_btrs.c143 config = REG_GET_FLD(VPU_HW_BTRS_LNL_TILE_FUSE, CONFIG, fuse); in read_tile_config_fuse()
233 val = REG_SET_FLD_NUM(VPU_HW_BTRS_MTL_WP_REQ_PAYLOAD2, CONFIG, wp->cfg, val); in wp_request_mtl()
256 val = REG_SET_FLD_NUM(VPU_HW_BTRS_LNL_WP_REQ_PAYLOAD2, CONFIG, wp->cfg, val); in wp_request_lnl()
/drivers/mtd/nand/raw/
A Dtegra_nand.c60 #define CONFIG 0x10 macro
491 writel_relaxed(nand->config_ecc, ctrl->regs + CONFIG); in tegra_nand_hw_ecc()
493 writel_relaxed(nand->config, ctrl->regs + CONFIG); in tegra_nand_hw_ecc()
1056 writel_relaxed(nand->config, ctrl->regs + CONFIG); in tegra_nand_attach_chip()
/drivers/gpu/drm/mediatek/
A Dmtk_dsi.c151 #define CONFIG GENMASK(7, 0) macro
1080 cmdq_mask = CONFIG | DATA_ID | DATA_0 | DATA_1; in mtk_dsi_cmdq()
1085 cmdq_mask = CONFIG | DATA_ID; in mtk_dsi_cmdq()

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