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Searched refs:CPU_CS_BASE_OFFS (Results 1 – 3 of 3) sorted by relevance

/drivers/media/platform/qcom/iris/
A Diris_vpu_common.c19 #define CPU_CS_A2HSOFTINTCLR (CPU_CS_BASE_OFFS + 0x1C)
22 #define CTRL_INIT (CPU_CS_BASE_OFFS + 0x48)
23 #define CTRL_STATUS (CPU_CS_BASE_OFFS + 0x4C)
29 #define QTBL_INFO (CPU_CS_BASE_OFFS + 0x50)
32 #define QTBL_ADDR (CPU_CS_BASE_OFFS + 0x54)
33 #define CPU_CS_SCIACMDARG3 (CPU_CS_BASE_OFFS + 0x58)
34 #define SFR_ADDR (CPU_CS_BASE_OFFS + 0x5C)
35 #define UC_REGION_ADDR (CPU_CS_BASE_OFFS + 0x64)
36 #define UC_REGION_SIZE (CPU_CS_BASE_OFFS + 0x68)
38 #define CPU_CS_H2XSOFTINTEN (CPU_CS_BASE_OFFS + 0x148)
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A Diris_vpu_register_defines.h13 #define CPU_CS_BASE_OFFS (CPU_BASE_OFFS) macro
A Diris_vpu3x.c32 #define CPU_CS_AHB_BRIDGE_SYNC_RESET (CPU_CS_BASE_OFFS + 0x160)
36 #define CPU_CS_X2RPMH (CPU_CS_BASE_OFFS + 0x168)

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