Searched refs:CRC (Results 1 – 19 of 19) sorted by relevance
| /drivers/soc/samsung/ |
| A D | Kconfig | 53 bool "S3C2410 PM Suspend Memory CRC"
66 int "S3C2410 PM Suspend CRC Chunksize (KiB)"
70 Set the chunksize in Kilobytes of the CRC for checking memory
72 the CRC data block will take more memory, but will identify any
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| /drivers/net/ethernet/amd/ |
| A D | nmclan_cs.c | 1287 static void updateCRC(int *CRC, int bit) in updateCRC() argument
1301 CRC[j] = CRC[j-1]; in updateCRC()
1302 CRC[0] = 0; in updateCRC()
1305 if (bit ^ CRC[32]) in updateCRC()
1307 CRC[j] ^= poly[j]; in updateCRC()
1321 int CRC[33]={1}; /* CRC register, 1 word/bit + extra control bit */ in BuildLAF() local
1326 CRC[32]=0; in BuildLAF()
1330 updateCRC(CRC, (adr[byte] >> i) & 1); in BuildLAF()
1334 hashcode = (hashcode << 1) + CRC[i]; in BuildLAF()
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| /drivers/char/xilinx_hwicap/ |
| A D | xilinx_hwicap.c | 118 .CRC = 0,
143 .CRC = 0,
168 .CRC = 0,
193 .CRC = 0,
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| A D | xilinx_hwicap.h | 125 u32 CRC; member
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| /drivers/net/wireless/marvell/libertas_tf/ |
| A D | if_usb.h | 76 __le32 CRC; member
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| /drivers/net/wireless/marvell/libertas/ |
| A D | if_usb.h | 86 __le32 CRC; member
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| /drivers/soc/hisilicon/ |
| A D | Kconfig | 15 ports are not in full lane status, have a large number of CRC
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| /drivers/net/ethernet/intel/fm10k/ |
| A D | fm10k_mbx.c | 868 mbx->mbx_hdr = hdr | FM10K_MSG_HDR_FIELD_SET(crc, CRC); in fm10k_mbx_create_data_hdr()
887 mbx->mbx_hdr = hdr | FM10K_MSG_HDR_FIELD_SET(crc, CRC); in fm10k_mbx_create_disconnect_hdr()
908 mbx->mbx_hdr = hdr | FM10K_MSG_HDR_FIELD_SET(crc, CRC); in fm10k_mbx_create_fake_disconnect_hdr()
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| /drivers/pci/pcie/ |
| A D | Kconfig | 69 (transaction layer end-to-end CRC checking).
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| /drivers/w1/slaves/ |
| A D | Kconfig | 104 Full block writes are only allowed if the CRC is valid.
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| /drivers/scsi/aic7xxx/ |
| A D | aic7xxx.reg | 184 field ENABLE_CRC 0x40 /* CRC for D-Phases */
356 field CRCVALERR 0x08 /* CRC doesn't match (U3 only) */
357 field CRCENDERR 0x04 /* No terminal CRC packet (U3 only) */
358 field CRCREQERR 0x02 /* Illegal CRC packet req (U3 only) */
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| A D | aic79xx.reg | 2522 * CRC Control
2587 * Data Group CRC Interval.
2618 * Packetized CRC Interval
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| A D | aic79xx.seq | 2121 * phases that are typically caused by CRC errors in status packet
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| /drivers/net/ethernet/ |
| A D | fealnx.c | 256 CRC = 0x08, /* crc error */ enumerator
1636 if (rx_status & CRC) in netdev_rx()
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| /drivers/pwm/ |
| A D | Kconfig | 201 tristate "Intel Crystalcove (CRC) PWM support"
204 Generic PWM framework driver for Crystalcove (CRC) PMIC based PWM
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| /drivers/media/dvb-frontends/drx39xyj/ |
| A D | drxj.c | 1007 u16 CRC; member
11664 block_hdr.CRC = be16_to_cpu(*(__be16 *)(mc_data + count)); in drx_check_firmware()
11669 block_hdr.CRC); in drx_check_firmware()
11803 block_hdr.CRC = be16_to_cpu(*(__be16 *)(mc_data)); in drx_ctrl_u_code()
11808 block_hdr.size, block_hdr.flags, block_hdr.CRC); in drx_ctrl_u_code()
11816 (block_hdr.CRC != drx_u_code_compute_crc(mc_data, block_hdr.size))) in drx_ctrl_u_code()
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| /drivers/gpu/drm/ci/xfails/ |
| A D | vkms-none-skips.txt | 58 # [drm:drm_crtc_add_crc_entry] *ERROR* Overflow of CRC buffer, userspace reads too slow.
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| /drivers/net/ethernet/emulex/benet/ |
| A D | be_main.c | 859 BE_WRB_F_SET(wrb_params->features, CRC, 1); in be_get_wrb_params_from_skb()
870 BE_WRB_F_GET(wrb_params->features, CRC)); in wrb_fill_hdr()
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| /drivers/gpio/ |
| A D | Kconfig | 1867 CRC checksums to guard against electromagnetic interference,
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