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Searched refs:CRTC0_REGISTER_OFFSET (Results 1 – 7 of 7) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
A Dvid.h33 #define CRTC0_REGISTER_OFFSET (0x1b9c - 0x1b9c) macro
A Dcikd.h39 #define CRTC0_REGISTER_OFFSET (0x1b7c - 0x1b7c) macro
A Dsid.h635 #define CRTC0_REGISTER_OFFSET (0x1b7c - 0x1b7c) //(0x6df0 - 0x6df0)/4 macro
A Ddce_v8_0.c58 CRTC0_REGISTER_OFFSET,
76 CRTC0_REGISTER_OFFSET,
2935 reg_block = CRTC0_REGISTER_OFFSET; in dce_v8_0_set_crtc_vblank_interrupt_state()
2986 reg_block = CRTC0_REGISTER_OFFSET; in dce_v8_0_set_crtc_vline_interrupt_state()
A Ddce_v6_0.c69 CRTC0_REGISTER_OFFSET,
88 CRTC0_REGISTER_OFFSET,
2963 reg_block = CRTC0_REGISTER_OFFSET; in dce_v6_0_set_crtc_vblank_interrupt_state()
A Ddce_v10_0.c58 CRTC0_REGISTER_OFFSET,
2739 amdgpu_crtc->crtc_offset = CRTC0_REGISTER_OFFSET; in dce_v10_0_crtc_init()
A Ddce_v11_0.c59 CRTC0_REGISTER_OFFSET,
2852 amdgpu_crtc->crtc_offset = CRTC0_REGISTER_OFFSET; in dce_v11_0_crtc_init()

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