| /drivers/scsi/aacraid/ |
| A D | aacraid.h | 1077 #define sa_readw(AEP, CSR) readl(&((AEP)->regs.sa->CSR)) argument
1078 #define sa_readl(AEP, CSR) readl(&((AEP)->regs.sa->CSR)) argument
1079 #define sa_writew(AEP, CSR, value) writew(value, &((AEP)->regs.sa->CSR)) argument
1080 #define sa_writel(AEP, CSR, value) writel(value, &((AEP)->regs.sa->CSR)) argument
1139 #define rx_readb(AEP, CSR) readb(&((AEP)->regs.rx->CSR)) argument
1140 #define rx_readl(AEP, CSR) readl(&((AEP)->regs.rx->CSR)) argument
1141 #define rx_writeb(AEP, CSR, value) writeb(value, &((AEP)->regs.rx->CSR)) argument
1157 #define rkt_readb(AEP, CSR) readb(&((AEP)->regs.rkt->CSR)) argument
1158 #define rkt_readl(AEP, CSR) readl(&((AEP)->regs.rkt->CSR)) argument
1205 #define src_readb(AEP, CSR) readb(&((AEP)->regs.src.bar0->CSR)) argument
[all …]
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| /drivers/tty/serial/ |
| A D | rsci.c | 28 #define CSR 0x48 macro
185 unsigned int status = rsci_serial_in(port, CSR); in rsci_tx_empty()
255 status = rsci_serial_in(port, CSR); in rsci_transmit_chars()
302 status = rsci_serial_in(port, CSR); in rsci_receive_chars()
345 rsci_serial_in(port, CSR); /* dummy read */ in rsci_receive_chars()
358 rsci_serial_in(port, CSR); /* dummy read */ in rsci_receive_chars()
368 ret = readl_relaxed_poll_timeout_atomic(port->membase + CSR, status, in rsci_poll_put_char()
409 .status = CSR,
421 .overrun_reg = CSR,
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| /drivers/dma/ |
| A D | txx9dmac.c | 296 channel64_readl(dc, CSR)); in txx9dmac_dump_regs()
308 channel32_readl(dc, CSR)); in txx9dmac_dump_regs()
493 d->SAIR, d->DAIR, d->CCR, d->CSR); in txx9dmac_dump_desc()
519 channel_writel(dc, CSR, errors); in txx9dmac_handle_error()
545 csr = channel64_readl(dc, CSR); in txx9dmac_scan_descriptors()
546 channel64_writel(dc, CSR, csr); in txx9dmac_scan_descriptors()
549 csr = channel32_readl(dc, CSR); in txx9dmac_scan_descriptors()
550 channel32_writel(dc, CSR, csr); in txx9dmac_scan_descriptors()
611 csr = channel_readl(dc, CSR); in txx9dmac_chan_tasklet()
629 channel_readl(dc, CSR)); in txx9dmac_chan_interrupt()
[all …]
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| A D | txx9dmac.h | 78 TXX9_DMA_REG32(CSR); /* Channel Status Register */
88 u32 CSR; member
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| /drivers/soc/litex/ |
| A D | Kconfig | 15 LiteX CSR access and provides common litex_[read|write]*
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| /drivers/staging/gpib/include/ |
| A D | tnt4882_registers.h | 28 CSR = KEYREG, enumerator
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| /drivers/regulator/ |
| A D | bcm590xx-regulator.c | 373 BCM59056_SR_DESC(CSR, csr, dcdc_csr_ranges),
750 BCM59054_SR_DESC(CSR, csr, dcdc_csr_ranges),
984 BCM59054_SR_DESC(CSR, csr, dcdc_csr_ranges),
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| /drivers/misc/eeprom/ |
| A D | Kconfig | 101 tristate "IDT 89HPESx PCIe-switches EEPROM / CSR support"
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| /drivers/dma/ti/ |
| A D | omap-dma.c | 386 omap_dma_chan_read(c, CSR); in omap_dma_clear_csr()
388 omap_dma_chan_write(c, CSR, ~0); in omap_dma_clear_csr()
393 unsigned val = omap_dma_chan_read(c, CSR); in omap_dma_get_csr()
396 omap_dma_chan_write(c, CSR, val); in omap_dma_get_csr()
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| /drivers/net/ethernet/renesas/ |
| A D | ravb.h | 53 CSR = 0x000C, enumerator
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| A D | ravb_main.c | 77 error = ravb_wait(ndev, CSR, CSR_OPS, csr_ops); in ravb_set_opmode()
1082 error = ravb_wait(ndev, CSR, CSR_TPO0 | CSR_TPO1 | CSR_TPO2 | CSR_TPO3, in ravb_stop_dma()
1091 error = ravb_wait(ndev, CSR, CSR_RPO, 0); in ravb_stop_dma()
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| /drivers/spi/ |
| A D | spi-at91-usart.c | 279 aus->status = at91_usart_spi_readl(aus, CSR); in at91_usart_spi_read_status()
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| /drivers/staging/gpib/tnt4882/ |
| A D | tnt4882_gpib.c | 88 case CSR: in tnt_readb()
980 switch (tnt_readb(tnt_priv, CSR) & 0xf0) { in ni_pci_attach()
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| /drivers/bluetooth/ |
| A D | Kconfig | 157 USB Bluetooth devices based on CSR BlueCore chip, including PCMCIA and
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| /drivers/iommu/riscv/ |
| A D | iommu.c | 111 _q->qcr = RISCV_IOMMU_REG_ ## name ## CSR; \
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| /drivers/mmc/host/ |
| A D | Kconfig | 940 the Cypress Astoria chip with firmware compliant with CSR's
943 CSR boards with this device include: USB<>SDIO (M1985v2),
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| /drivers/firmware/arm_scmi/vendors/imx/ |
| A D | imx95.rst | 1273 control modules, IOMUX_GPR, and other GPR/CSR owned by the SM. This protocol
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