Searched refs:CSR_BASE (Results 1 – 4 of 4) sorted by relevance
27 #define CSR_BASE (0x000) macro40 #define CSR_INT_PERIODIC_REG (CSR_BASE+0x005)61 #define CSR_HW_RF_ID (CSR_BASE+0x09c)71 #define CSR_OTP_GP_REG (CSR_BASE+0x034)73 #define CSR_GIO_REG (CSR_BASE+0x03C)74 #define CSR_GP_UCODE_REG (CSR_BASE+0x048)75 #define CSR_GP_DRIVER_REG (CSR_BASE+0x050)86 #define CSR_MBOX_SET_REG (CSR_BASE + 0x88)110 #define CSR_IPC_STATE (CSR_BASE + 0x110)128 #define CSR_HOST_CHICKEN (CSR_BASE + 0x204)[all …]
83 #define CSR_BASE (0x000) macro92 #define CSR_GP_CNTRL (CSR_BASE+0x024)95 #define CSR_INT_PERIODIC_REG (CSR_BASE+0x005)108 #define CSR_HW_REV (CSR_BASE+0x028)116 #define CSR_EEPROM_REG (CSR_BASE+0x02c)119 #define CSR_GIO_REG (CSR_BASE+0x03C)120 #define CSR_GP_UCODE_REG (CSR_BASE+0x048)121 #define CSR_GP_DRIVER_REG (CSR_BASE+0x050)133 #define CSR_DRAM_INT_TBL_REG (CSR_BASE+0x0A0)149 #define CSR_HW_REV_WA_REG (CSR_BASE+0x22C)[all …]
386 NCR5380_write(hostdata->c400_ctl_status, CSR_BASE); in generic_NCR5380_init_one()508 NCR5380_write(hostdata->c400_ctl_status, CSR_BASE); in wait_for_53c80_access()526 NCR5380_write(hostdata->c400_ctl_status, CSR_BASE | CSR_TRANS_DIR); in generic_NCR5380_precv()562 NCR5380_write(hostdata->c400_ctl_status, CSR_BASE); in generic_NCR5380_precv()593 NCR5380_write(hostdata->c400_ctl_status, CSR_BASE); in generic_NCR5380_psend()641 NCR5380_write(hostdata->c400_ctl_status, CSR_BASE); in generic_NCR5380_psend()
170 #define CSR_BASE CSR_53C80_INTR macro
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