| /drivers/gpu/drm/amd/display/dc/dcn10/ |
| A D | dcn10_ipp.h | 47 SRI(CURSOR_CONTROL, CURSOR, id), \
58 SRI(CURSOR_CONTROL, CURSOR0_, id), \
68 SRI(CURSOR_CONTROL, CURSOR0_, id), \
193 uint32_t CURSOR_CONTROL; member
|
| /drivers/gpu/drm/amd/display/dc/hubp/dcn32/ |
| A D | dcn32_hubp.c | 83 REG_UPDATE(CURSOR_CONTROL, CURSOR_REQ_MODE, enable); in hubp32_prepare_subvp_buffering()
133 REG_UPDATE_4(CURSOR_CONTROL, in hubp32_cursor_set_attributes()
|
| /drivers/gpu/drm/amd/display/dc/hubp/dcn31/ |
| A D | dcn31_hubp.c | 47 REG_UPDATE(CURSOR_CONTROL, CURSOR_REQ_MODE, 1); in hubp31_set_unbounded_requesting()
|
| /drivers/video/fbdev/ |
| A D | i740_reg.h | 151 #define CURSOR_CONTROL 0xA0 macro
|
| /drivers/gpu/drm/amd/display/dc/hubp/dcn201/ |
| A D | dcn201_hubp.h | 44 SRI(CURSOR_CONTROL, CURSOR0_, id), \
|
| /drivers/gpu/drm/amd/display/dc/dpp/dcn201/ |
| A D | dcn201_dpp.c | 180 REG_UPDATE(CURSOR_CONTROL, in dpp201_cnv_setup()
|
| /drivers/gpu/drm/amd/display/dc/hubp/dcn10/ |
| A D | dcn10_hubp.c | 77 REG_UPDATE(CURSOR_CONTROL, in hubp1_disconnect()
1185 REG_UPDATE_3(CURSOR_CONTROL, in hubp1_cursor_set_attributes()
1274 REG_UPDATE(CURSOR_CONTROL, in hubp1_cursor_set_position()
|
| A D | dcn10_hubp.h | 140 SRI(CURSOR_CONTROL, CURSOR, id), \
248 uint32_t CURSOR_CONTROL; \
|
| /drivers/gpu/drm/amd/display/dc/dpp/dcn20/ |
| A D | dcn20_dpp.c | 249 REG_UPDATE(CURSOR_CONTROL, in dpp2_cnv_setup()
|
| A D | dcn20_dpp.h | 166 SRI(CURSOR_CONTROL, CURSOR0_, id), \
180 SRI(CURSOR_CONTROL, CURSOR0_, id),\
|
| /drivers/gpu/drm/amd/display/dc/dpp/dcn30/ |
| A D | dcn30_dpp.h | 145 SRI(CURSOR_CONTROL, CURSOR0_, id), \
158 SRI(CURSOR_CONTROL, CURSOR0_, id),\
|
| A D | dcn30_dpp.c | 375 REG_UPDATE(CURSOR_CONTROL, in dpp3_cnv_setup()
|
| /drivers/gpu/drm/amd/display/dc/hubp/dcn401/ |
| A D | dcn401_hubp.c | 749 REG_UPDATE(CURSOR_CONTROL, in hubp401_cursor_set_position()
989 REG_UPDATE(CURSOR_CONTROL, CURSOR_REQ_MODE, 1); in hubp401_set_unbounded_requesting()
|
| /drivers/gpu/drm/amd/display/dc/hubp/dcn20/ |
| A D | dcn20_hubp.h | 45 SRI(CURSOR_CONTROL, CURSOR0_, id), \
|
| A D | dcn20_hubp.c | 625 REG_UPDATE_4(CURSOR_CONTROL, in hubp2_cursor_set_attributes()
1065 REG_UPDATE(CURSOR_CONTROL, in hubp2_cursor_set_position()
|
| /drivers/gpu/drm/amd/display/dc/dpp/dcn10/ |
| A D | dcn10_dpp.c | 406 REG_UPDATE(CURSOR_CONTROL, in dpp1_cnv_setup()
|
| A D | dcn10_dpp.h | 180 SRI(CURSOR_CONTROL, CURSOR, id), \
1345 uint32_t CURSOR_CONTROL; \
|
| /drivers/gpu/drm/amd/display/dc/resource/dcn401/ |
| A D | dcn401_resource.h | 113 SRI_ARR(CURSOR_CONTROL, CURSOR0_, id), \
333 SRI_ARR(CURSOR_CONTROL, CURSOR0_, id), \
|
| /drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
| A D | dcn32_resource.h | 521 SRI_ARR(CURSOR_CONTROL, CURSOR0_, id), \
534 SRI_ARR(CURSOR_CONTROL, CURSOR0_, id), \
1155 SRI_ARR(CURSOR_CONTROL, CURSOR0_, id), \
|