Searched refs:CXL_DVSEC_PORT_GPF_PHASE_2_CONTROL_OFFSET (Results 1 – 2 of 2) sorted by relevance
| /drivers/cxl/ | ||
| A D | cxlpci.h | 46 #define CXL_DVSEC_PORT_GPF_PHASE_2_CONTROL_OFFSET 0xE macro |
| /drivers/cxl/core/ | ||
| A D | pci.c | 1124 offset = CXL_DVSEC_PORT_GPF_PHASE_2_CONTROL_OFFSET; in update_gpf_port_dvsec() |
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