Searched refs:DAR (Results 1 – 7 of 7) sorted by relevance
| /drivers/dma/ |
| A D | txx9dmac.h | 73 u64 DAR; /* Destination Address Register */ member
83 u32 DAR; member
207 u64 DAR; member
213 u32 DAR; member
|
| A D | txx9dmac.c | 291 channel64_readq(dc, DAR), in txx9dmac_dump_regs()
303 channel32_readl(dc, DAR), in txx9dmac_dump_regs()
317 channel_writeq(dc, DAR, 0); in txx9dmac_reset_chan()
321 channel_writel(dc, DAR, 0); in txx9dmac_reset_chan()
487 d->CHAR, d->SAR, d->DAR, d->CNTR); in txx9dmac_dump_desc()
492 d->CHAR, d->SAR, d->DAR, d->CNTR, in txx9dmac_dump_desc()
756 desc->hwdesc.DAR = dest + offset; in txx9dmac_prep_dma_memcpy()
843 desc->hwdesc.DAR = ds->tx_reg; in txx9dmac_prep_slave_sg()
846 desc->hwdesc.DAR = mem; in txx9dmac_prep_slave_sg()
852 desc->hwdesc32.DAR = ds->tx_reg; in txx9dmac_prep_slave_sg()
[all …]
|
| A D | idma64.c | 95 channel_writeq(idma64c, DAR, 0); in idma64_chan_start()
|
| A D | pl330.c | 341 DAR, enumerator
732 dst == SAR ? "SAR" : (dst == DAR ? "DAR" : "CCR"), val); in _emit_MOV()
1402 off += _emit_MOV(dry_run, &buf[off], DAR, x->dst_addr); in _setup_xfer()
|
| /drivers/dma/sh/ |
| A D | shdmac.c | 38 #define DAR 0x04 /* Destination Address Register */ macro
217 sh_dmae_writel(sh_chan, hw->dar, DAR); in dmae_set_reg()
460 u32 dar_buf = sh_dmae_readl(sh_chan, DAR); in sh_dmae_desc_completed()
|
| /drivers/dma/dw/ |
| A D | regs.h | 41 DW_REG(DAR); /* Destination Address Register */
|
| A D | core.c | 133 channel_readl(dwc, DAR), in dwc_dump_chan_regs()
162 channel_writel(dwc, DAR, lli_read(desc, dar)); in dwc_do_single_block()
|
Completed in 23 milliseconds