| /drivers/gpu/drm/amd/display/dc/irq/dcn351/ |
| A D | irq_service_dcn351.c | 88 return DC_IRQ_SOURCE_HPD1RX; in to_dal_irq_source_dcn351()
195 IRQ_REG_ENTRY(DC_IRQ_SOURCE_HPD1RX, HPD, reg_num,\
198 REG_STRUCT[DC_IRQ_SOURCE_HPD1RX + reg_num].status_reg = SRI(DC_HPD_INT_STATUS, HPD, reg_num);\
199 REG_STRUCT[DC_IRQ_SOURCE_HPD1RX + reg_num].funcs = &hpd_rx_irq_info_funcs;\
|
| /drivers/gpu/drm/amd/display/dc/irq/dcn35/ |
| A D | irq_service_dcn35.c | 109 return DC_IRQ_SOURCE_HPD1RX; in to_dal_irq_source_dcn35()
216 IRQ_REG_ENTRY(DC_IRQ_SOURCE_HPD1RX, HPD, reg_num,\
219 REG_STRUCT[DC_IRQ_SOURCE_HPD1RX + reg_num].status_reg = SRI(DC_HPD_INT_STATUS, HPD, reg_num);\
220 REG_STRUCT[DC_IRQ_SOURCE_HPD1RX + reg_num].funcs = &hpd_rx_irq_info_funcs;\
|
| /drivers/gpu/drm/amd/display/dc/irq/dcn36/ |
| A D | irq_service_dcn36.c | 87 return DC_IRQ_SOURCE_HPD1RX; in to_dal_irq_source_dcn36()
194 IRQ_REG_ENTRY(DC_IRQ_SOURCE_HPD1RX, HPD, reg_num,\
197 REG_STRUCT[DC_IRQ_SOURCE_HPD1RX + reg_num].status_reg = SRI(DC_HPD_INT_STATUS, HPD, reg_num);\
198 REG_STRUCT[DC_IRQ_SOURCE_HPD1RX + reg_num].funcs = &hpd_rx_irq_info_funcs;\
|
| /drivers/gpu/drm/amd/display/dc/irq/dcn303/ |
| A D | irq_service_dcn303.c | 67 return DC_IRQ_SOURCE_HPD1RX; in to_dal_irq_source_dcn303()
144 [DC_IRQ_SOURCE_HPD1RX + reg_num] = {\
|
| /drivers/gpu/drm/amd/display/dc/irq/dcn201/ |
| A D | irq_service_dcn201.c | 70 return DC_IRQ_SOURCE_HPD1RX; in to_dal_irq_source_dcn201()
149 [DC_IRQ_SOURCE_HPD1RX + reg_num] = {\
|
| /drivers/gpu/drm/amd/display/dc/irq/dcn10/ |
| A D | irq_service_dcn10.c | 111 return DC_IRQ_SOURCE_HPD1RX; in to_dal_irq_source_dcn10()
197 [DC_IRQ_SOURCE_HPD1RX + reg_num] = {\
|
| /drivers/gpu/drm/amd/display/dc/irq/dcn20/ |
| A D | irq_service_dcn20.c | 112 return DC_IRQ_SOURCE_HPD1RX; in to_dal_irq_source_dcn20()
202 [DC_IRQ_SOURCE_HPD1RX + reg_num] = {\
|
| /drivers/gpu/drm/amd/display/dc/irq/dcn21/ |
| A D | irq_service_dcn21.c | 113 return DC_IRQ_SOURCE_HPD1RX; in to_dal_irq_source_dcn21()
224 [DC_IRQ_SOURCE_HPD1RX + reg_num] = {\
|
| /drivers/gpu/drm/amd/display/dc/irq/dcn31/ |
| A D | irq_service_dcn31.c | 110 return DC_IRQ_SOURCE_HPD1RX; in to_dal_irq_source_dcn31()
219 [DC_IRQ_SOURCE_HPD1RX + reg_num] = {\
|
| /drivers/gpu/drm/amd/display/dc/irq/dcn314/ |
| A D | irq_service_dcn314.c | 112 return DC_IRQ_SOURCE_HPD1RX; in to_dal_irq_source_dcn314()
221 [DC_IRQ_SOURCE_HPD1RX + reg_num] = {\
|
| /drivers/gpu/drm/amd/display/dc/irq/dcn315/ |
| A D | irq_service_dcn315.c | 117 return DC_IRQ_SOURCE_HPD1RX; in to_dal_irq_source_dcn315()
226 [DC_IRQ_SOURCE_HPD1RX + reg_num] = {\
|
| /drivers/gpu/drm/amd/display/dc/irq/dce110/ |
| A D | irq_service_dce110.c | 105 [DC_IRQ_SOURCE_HPD1RX + reg_num] = {\
385 return DC_IRQ_SOURCE_HPD1RX; in to_dal_irq_source_dce110()
|
| /drivers/gpu/drm/amd/display/dc/irq/dcn30/ |
| A D | irq_service_dcn30.c | 121 return DC_IRQ_SOURCE_HPD1RX; in to_dal_irq_source_dcn30()
231 [DC_IRQ_SOURCE_HPD1RX + reg_num] = {\
|
| /drivers/gpu/drm/amd/display/dc/irq/dcn302/ |
| A D | irq_service_dcn302.c | 108 return DC_IRQ_SOURCE_HPD1RX; in to_dal_irq_source_dcn302()
220 [DC_IRQ_SOURCE_HPD1RX + reg_num] = {\
|
| /drivers/gpu/drm/amd/display/dc/irq/dcn401/ |
| A D | irq_service_dcn401.c | 91 return DC_IRQ_SOURCE_HPD1RX; in to_dal_irq_source_dcn401()
210 [DC_IRQ_SOURCE_HPD1RX + reg_num] = {\
|
| /drivers/gpu/drm/amd/display/dc/irq/dcn32/ |
| A D | irq_service_dcn32.c | 111 return DC_IRQ_SOURCE_HPD1RX; in to_dal_irq_source_dcn32()
230 [DC_IRQ_SOURCE_HPD1RX + reg_num] = {\
|
| /drivers/gpu/drm/amd/display/dc/ |
| A D | irq_types.h | 51 DC_IRQ_SOURCE_HPD1RX, enumerator
|
| /drivers/gpu/drm/amd/display/dc/irq/dce120/ |
| A D | irq_service_dce120.c | 100 [DC_IRQ_SOURCE_HPD1RX + reg_num] = {\
|
| /drivers/gpu/drm/amd/display/dc/irq/dce60/ |
| A D | irq_service_dce60.c | 320 return DC_IRQ_SOURCE_HPD1RX; in to_dal_irq_source_dce60()
|
| /drivers/gpu/drm/amd/display/dc/gpio/ |
| A D | gpio_service.c | 407 return (enum dc_irq_source)(DC_IRQ_SOURCE_HPD1RX + in dal_irq_get_rx_source()
|
| /drivers/gpu/drm/amd/display/amdgpu_dm/ |
| A D | amdgpu_dm_irq.c | 527 for (src = DC_IRQ_SOURCE_HPD1RX; src <= DC_IRQ_SOURCE_HPD6RX; src++) { in amdgpu_dm_irq_resume_early()
|
| A D | amdgpu_dm.c | 4091 int_params.irq_source < DC_IRQ_SOURCE_HPD1RX || in register_hpd_handlers()
|