Searched refs:DC_IRQ_SOURCE_VUPDATE1 (Results 1 – 22 of 22) sorted by relevance
| /drivers/gpu/drm/amd/display/dc/irq/dcn201/ |
| A D | irq_service_dcn201.c | 59 return DC_IRQ_SOURCE_VUPDATE1; in to_dal_irq_source_dcn201()
165 [DC_IRQ_SOURCE_VUPDATE1 + reg_num] = {\
176 [DC_IRQ_SOURCE_VUPDATE1 + reg_num] = {\
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| /drivers/gpu/drm/amd/display/dc/ |
| A D | irq_types.h | 126 DC_IRQ_SOURCE_VUPDATE1, enumerator
184 IRQ_TYPE_VUPDATE = DC_IRQ_SOURCE_VUPDATE1,
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| /drivers/gpu/drm/amd/display/dc/irq/dcn351/ |
| A D | irq_service_dcn351.c | 59 return DC_IRQ_SOURCE_VUPDATE1; in to_dal_irq_source_dcn351()
211 IRQ_REG_ENTRY(DC_IRQ_SOURCE_VUPDATE1, OTG, reg_num,\
214 REG_STRUCT[DC_IRQ_SOURCE_VUPDATE1 + reg_num].funcs = &vupdate_no_lock_irq_info_funcs\
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| /drivers/gpu/drm/amd/display/dc/irq/dcn35/ |
| A D | irq_service_dcn35.c | 80 return DC_IRQ_SOURCE_VUPDATE1; in to_dal_irq_source_dcn35()
232 IRQ_REG_ENTRY(DC_IRQ_SOURCE_VUPDATE1, OTG, reg_num,\
235 REG_STRUCT[DC_IRQ_SOURCE_VUPDATE1 + reg_num].funcs = &vupdate_no_lock_irq_info_funcs\
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| /drivers/gpu/drm/amd/display/dc/irq/dcn36/ |
| A D | irq_service_dcn36.c | 58 return DC_IRQ_SOURCE_VUPDATE1; in to_dal_irq_source_dcn36()
210 IRQ_REG_ENTRY(DC_IRQ_SOURCE_VUPDATE1, OTG, reg_num,\
213 REG_STRUCT[DC_IRQ_SOURCE_VUPDATE1 + reg_num].funcs = &vupdate_no_lock_irq_info_funcs\
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| /drivers/gpu/drm/amd/display/dc/irq/dcn303/ |
| A D | irq_service_dcn303.c | 55 return DC_IRQ_SOURCE_VUPDATE1; in to_dal_irq_source_dcn303()
163 [DC_IRQ_SOURCE_VUPDATE1 + reg_num] = {\
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| /drivers/gpu/drm/amd/display/dc/irq/dce60/ |
| A D | irq_service_dce60.c | 119 [DC_IRQ_SOURCE_VUPDATE1 + reg_num] = {\
280 return DC_IRQ_SOURCE_VUPDATE1; in to_dal_irq_source_dce60()
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| /drivers/gpu/drm/amd/display/dc/irq/dcn10/ |
| A D | irq_service_dcn10.c | 71 return DC_IRQ_SOURCE_VUPDATE1; in to_dal_irq_source_dcn10()
216 [DC_IRQ_SOURCE_VUPDATE1 + reg_num] = {\
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| /drivers/gpu/drm/amd/display/dc/irq/dcn20/ |
| A D | irq_service_dcn20.c | 84 return DC_IRQ_SOURCE_VUPDATE1; in to_dal_irq_source_dcn20()
221 [DC_IRQ_SOURCE_VUPDATE1 + reg_num] = {\
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| /drivers/gpu/drm/amd/display/dc/irq/dcn21/ |
| A D | irq_service_dcn21.c | 85 return DC_IRQ_SOURCE_VUPDATE1; in to_dal_irq_source_dcn21()
243 [DC_IRQ_SOURCE_VUPDATE1 + reg_num] = {\
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| /drivers/gpu/drm/amd/display/dc/irq/dcn31/ |
| A D | irq_service_dcn31.c | 81 return DC_IRQ_SOURCE_VUPDATE1; in to_dal_irq_source_dcn31()
238 [DC_IRQ_SOURCE_VUPDATE1 + reg_num] = {\
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| /drivers/gpu/drm/amd/display/dc/irq/dcn314/ |
| A D | irq_service_dcn314.c | 83 return DC_IRQ_SOURCE_VUPDATE1; in to_dal_irq_source_dcn314()
240 [DC_IRQ_SOURCE_VUPDATE1 + reg_num] = {\
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| /drivers/gpu/drm/amd/display/dc/irq/dcn315/ |
| A D | irq_service_dcn315.c | 88 return DC_IRQ_SOURCE_VUPDATE1; in to_dal_irq_source_dcn315()
245 [DC_IRQ_SOURCE_VUPDATE1 + reg_num] = {\
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| /drivers/gpu/drm/amd/display/dc/irq/dce110/ |
| A D | irq_service_dce110.c | 133 [DC_IRQ_SOURCE_VUPDATE1 + reg_num] = {\
345 return DC_IRQ_SOURCE_VUPDATE1; in to_dal_irq_source_dce110()
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| /drivers/gpu/drm/amd/display/dc/irq/dcn30/ |
| A D | irq_service_dcn30.c | 93 return DC_IRQ_SOURCE_VUPDATE1; in to_dal_irq_source_dcn30()
250 [DC_IRQ_SOURCE_VUPDATE1 + reg_num] = {\
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| /drivers/gpu/drm/amd/display/dc/irq/dcn302/ |
| A D | irq_service_dcn302.c | 80 return DC_IRQ_SOURCE_VUPDATE1; in to_dal_irq_source_dcn302()
239 [DC_IRQ_SOURCE_VUPDATE1 + reg_num] = {\
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| /drivers/gpu/drm/amd/display/dc/irq/dcn401/ |
| A D | irq_service_dcn401.c | 61 return DC_IRQ_SOURCE_VUPDATE1; in to_dal_irq_source_dcn401()
236 [DC_IRQ_SOURCE_VUPDATE1 + reg_num] = {\
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| /drivers/gpu/drm/amd/display/dc/irq/dcn32/ |
| A D | irq_service_dcn32.c | 82 return DC_IRQ_SOURCE_VUPDATE1; in to_dal_irq_source_dcn32()
256 [DC_IRQ_SOURCE_VUPDATE1 + reg_num] = {\
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| /drivers/gpu/drm/amd/display/dc/irq/dce80/ |
| A D | irq_service_dce80.c | 110 [DC_IRQ_SOURCE_VUPDATE1 + reg_num] = {\
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| /drivers/gpu/drm/amd/display/dc/irq/dce120/ |
| A D | irq_service_dce120.c | 117 [DC_IRQ_SOURCE_VUPDATE1 + reg_num] = {\
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| /drivers/gpu/drm/amd/display/amdgpu_dm/ |
| A D | amdgpu_dm.h | 504 vupdate_params[DC_IRQ_SOURCE_VUPDATE6 - DC_IRQ_SOURCE_VUPDATE1 + 1];
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| A D | amdgpu_dm.c | 4274 int_params.irq_source < DC_IRQ_SOURCE_VUPDATE1 || in dce110_register_irq_handlers()
4280 c_irq_params = &adev->dm.vupdate_params[int_params.irq_source - DC_IRQ_SOURCE_VUPDATE1]; in dce110_register_irq_handlers()
4454 int_params.irq_source < DC_IRQ_SOURCE_VUPDATE1 || in dcn10_register_irq_handlers()
4460 c_irq_params = &adev->dm.vupdate_params[int_params.irq_source - DC_IRQ_SOURCE_VUPDATE1]; in dcn10_register_irq_handlers()
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