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Searched refs:DC_LOG_DEBUG (Results 1 – 22 of 22) sorted by relevance

/drivers/gpu/drm/amd/display/dc/hubp/dcn21/
A Ddcn21_hubp.c264 DC_LOG_DEBUG("DML Validation | Running Validation"); in hubp21_validate_dml_output()
309 DC_LOG_DEBUG("DML Validation | DCHUBP_REQ_SIZE_CONFIG_C:CHUNK_SIZE - Expected: %u Actual: %u\n", in hubp21_validate_dml_output()
334 DC_LOG_DEBUG("DML Validation | DCHUBP_REQ_SIZE_CONFIG:CHUNK_SIZE_C - Expected: %u Actual: %u\n", in hubp21_validate_dml_output()
371 DC_LOG_DEBUG("DML Validation | BLANK_OFFSET_0:REFCYC_H_BLANK_END - Expected: %u Actual: %u\n", in hubp21_validate_dml_output()
374 DC_LOG_DEBUG("DML Validation | BLANK_OFFSET_0:DLG_V_BLANK_END - Expected: %u Actual: %u\n", in hubp21_validate_dml_output()
377 DC_LOG_DEBUG("DML Validation | BLANK_OFFSET_1:MIN_DST_Y_NEXT_START - Expected: %u Actual: %u\n", in hubp21_validate_dml_output()
380 DC_LOG_DEBUG("DML Validation | DST_DIMENSIONS:REFCYC_PER_HTOTAL - Expected: %u Actual: %u\n", in hubp21_validate_dml_output()
386 DC_LOG_DEBUG("DML Validation | DST_AFTER_SCALER:DST_Y_AFTER_SCALER - Expected: %u Actual: %u\n", in hubp21_validate_dml_output()
483 DC_LOG_DEBUG("DML Validation | DCN_TTU_QOS_WM:QoS_LEVEL_LOW_WM - Expected: %u Actual: %u\n", in hubp21_validate_dml_output()
486 DC_LOG_DEBUG("DML Validation | DCN_TTU_QOS_WM:QoS_LEVEL_HIGH_WM - Expected: %u Actual: %u\n", in hubp21_validate_dml_output()
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/drivers/gpu/drm/amd/display/dc/hubp/dcn20/
A Ddcn20_hubp.c1370 DC_LOG_DEBUG("DML Validation | Running Validation"); in hubp2_validate_dml_output()
1416 DC_LOG_DEBUG("DML Validation | DCHUBP_REQ_SIZE_CONFIG_C:CHUNK_SIZE - Expected: %u Actual: %u\n", in hubp2_validate_dml_output()
1441 DC_LOG_DEBUG("DML Validation | DCHUBP_REQ_SIZE_CONFIG:CHUNK_SIZE_C - Expected: %u Actual: %u\n", in hubp2_validate_dml_output()
1480 DC_LOG_DEBUG("DML Validation | BLANK_OFFSET_0:REFCYC_H_BLANK_END - Expected: %u Actual: %u\n", in hubp2_validate_dml_output()
1483 DC_LOG_DEBUG("DML Validation | BLANK_OFFSET_0:DLG_V_BLANK_END - Expected: %u Actual: %u\n", in hubp2_validate_dml_output()
1486 DC_LOG_DEBUG("DML Validation | BLANK_OFFSET_1:MIN_DST_Y_NEXT_START - Expected: %u Actual: %u\n", in hubp2_validate_dml_output()
1489 DC_LOG_DEBUG("DML Validation | DST_DIMENSIONS:REFCYC_PER_HTOTAL - Expected: %u Actual: %u\n", in hubp2_validate_dml_output()
1495 DC_LOG_DEBUG("DML Validation | DST_AFTER_SCALER:DST_Y_AFTER_SCALER - Expected: %u Actual: %u\n", in hubp2_validate_dml_output()
1592 DC_LOG_DEBUG("DML Validation | DCN_TTU_QOS_WM:QoS_LEVEL_LOW_WM - Expected: %u Actual: %u\n", in hubp2_validate_dml_output()
1595 DC_LOG_DEBUG("DML Validation | DCN_TTU_QOS_WM:QoS_LEVEL_HIGH_WM - Expected: %u Actual: %u\n", in hubp2_validate_dml_output()
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/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/
A Ddcn301_smu.c139 DC_LOG_DEBUG("%s %x\n", __func__, smu_version); in dcn301_smu_get_smu_version()
149 DC_LOG_DEBUG("%s(%d)\n", __func__, requested_dispclk_khz); in dcn301_smu_set_dispclk()
164 DC_LOG_DEBUG("%s %d\n", __func__, clk_mgr->base.dprefclk_khz / 1000); in dcn301_smu_set_dprefclk()
180 DC_LOG_DEBUG("%s(%d)\n", __func__, requested_dcfclk_khz); in dcn301_smu_set_hard_min_dcfclk()
194 DC_LOG_DEBUG("%s(%d)\n", __func__, requested_min_ds_dcfclk_khz); in dcn301_smu_set_min_deep_sleep_dcfclk()
208 DC_LOG_DEBUG("%s(%d)\n", __func__, requested_dpp_khz); in dcn301_smu_set_dppclk()
222 DC_LOG_DEBUG("%s(%x)\n", __func__, idle_info); in dcn301_smu_set_display_idle_optimization()
239 DC_LOG_DEBUG("%s(%d)\n", __func__, enable); in dcn301_smu_enable_phy_refclk_pwrdwn()
257 DC_LOG_DEBUG("%s(%x)\n", __func__, addr_high); in dcn301_smu_set_dram_addr_high()
265 DC_LOG_DEBUG("%s(%x)\n", __func__, addr_low); in dcn301_smu_set_dram_addr_low()
/drivers/gpu/drm/amd/display/dc/link/protocols/
A Dlink_dp_dpia_bw.c70 DC_LOG_DEBUG("reset usb4 bw alloc of link(%d)\n", link->link_index); in reset_bw_alloc_struct()
157 DC_LOG_DEBUG("%s: bw_granularity(%d), estimated_bw(%d)\n", in retrieve_usb4_dp_bw_allocation_info()
160 DC_LOG_DEBUG("%s: nrd_max_link_rate(%d), nrd_max_lane_count(%d)\n", in retrieve_usb4_dp_bw_allocation_info()
176 DC_LOG_DEBUG("%s: resetting BW alloc config for link(%d)\n", in dpia_bw_alloc_unplug()
233 DC_LOG_DEBUG("%s: link[%d] DPTX BW allocation mode enabled", __func__, link->link_index); in link_dpia_enable_usb4_dp_bw_alloc_mode()
256 …DC_LOG_DEBUG("%s: link[%d] failed to enable DPTX BW allocation mode", __func__, link->link_index); in link_dpia_enable_usb4_dp_bw_alloc_mode()
275 DC_LOG_DEBUG("%s: BW Allocation request succeeded on link(%d)", in link_dp_dpia_handle_bw_alloc_status()
278 DC_LOG_DEBUG("%s: BW Allocation request failed on link(%d) allocated/estimated BW=%d", in link_dp_dpia_handle_bw_alloc_status()
283 DC_LOG_DEBUG("%s: Estimated BW changed on link(%d) new estimated BW=%d", in link_dp_dpia_handle_bw_alloc_status()
317 DC_LOG_DEBUG("%s: ENTER: link[%d] hpd(%d) Allocated_BW: %d Estimated_BW: %d Req_BW: %d", in link_dp_dpia_allocate_usb4_bandwidth_for_stream()
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A Dlink_dp_dpia.c89 DC_LOG_DEBUG("%s: Link[%d] DP tunneling support (RouterId=%d AdapterId=%d) " in dpcd_get_tunneling_device_data()
129 DC_LOG_DEBUG("%s: for link(%d) dpia(%d) success, current_hpd_status(%d) new_hpd_status(%d)\n", in dpia_query_hpd_status()
/drivers/gpu/drm/amd/display/dc/
A Ddc_dmub_srv.c278 DC_LOG_DEBUG("No reply for DMUB command: status=%d\n", status); in dc_dmub_srv_wait_for_idle()
967 DC_LOG_DEBUG("DMCUB STATE:"); in dc_dmub_srv_log_diagnostic_data()
969 DC_LOG_DEBUG(" scratch [0] : %08x", dc_dmub_srv->dmub->debug.scratch[0]); in dc_dmub_srv_log_diagnostic_data()
970 DC_LOG_DEBUG(" scratch [1] : %08x", dc_dmub_srv->dmub->debug.scratch[1]); in dc_dmub_srv_log_diagnostic_data()
971 DC_LOG_DEBUG(" scratch [2] : %08x", dc_dmub_srv->dmub->debug.scratch[2]); in dc_dmub_srv_log_diagnostic_data()
972 DC_LOG_DEBUG(" scratch [3] : %08x", dc_dmub_srv->dmub->debug.scratch[3]); in dc_dmub_srv_log_diagnostic_data()
973 DC_LOG_DEBUG(" scratch [4] : %08x", dc_dmub_srv->dmub->debug.scratch[4]); in dc_dmub_srv_log_diagnostic_data()
974 DC_LOG_DEBUG(" scratch [5] : %08x", dc_dmub_srv->dmub->debug.scratch[5]); in dc_dmub_srv_log_diagnostic_data()
975 DC_LOG_DEBUG(" scratch [6] : %08x", dc_dmub_srv->dmub->debug.scratch[6]); in dc_dmub_srv_log_diagnostic_data()
986 DC_LOG_DEBUG(" pc[%d] : %08x", i, dc_dmub_srv->dmub->debug.pc[i]); in dc_dmub_srv_log_diagnostic_data()
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/drivers/gpu/drm/amd/display/dc/dio/dcn35/
A Ddcn35_dio_link_encoder.c310 DC_LOG_DEBUG("%s: enc_id(%d)\n", __func__, enc->preferred_engine); in dcn35_link_encoder_enable_dp_output()
325 DC_LOG_DEBUG("%s: enc_id(%d)\n", __func__, enc->preferred_engine); in dcn35_link_encoder_enable_dp_mst_output()
339 DC_LOG_DEBUG("%s: enc_id(%d)\n", __func__, enc->preferred_engine); in dcn35_link_encoder_disable_output()
367 DC_LOG_DEBUG("%s: DPIA(%d) - enc_id(%d)\n", __func__, dpia_control.dpia_id, dpia_control.enc_id); in dcn35_link_encoder_enable_dpia_output()
387 DC_LOG_DEBUG("%s: DPIA(%d) - enc_id(%d)\n", __func__, dpia_control.dpia_id, dpia_control.enc_id); in dcn35_link_encoder_disable_dpia_output()
/drivers/gpu/drm/amd/display/dc/dio/dcn31/
A Ddcn31_dio_link_encoder.c460 DC_LOG_DEBUG("%s: enc_id(%d)\n", __func__, enc->preferred_engine); in dcn31_link_encoder_enable_dp_output()
492 DC_LOG_DEBUG("%s: DPIA(%d) - enc_id(%d)\n", __func__, dpia_control.dpia_id, dpia_control.enc_id); in dcn31_link_encoder_enable_dp_output()
507 DC_LOG_DEBUG("%s: enc_id(%d)\n", __func__, enc->preferred_engine); in dcn31_link_encoder_enable_dp_mst_output()
539 DC_LOG_DEBUG("%s: DPIA(%d) - enc_id(%d)\n", __func__, dpia_control.dpia_id, dpia_control.enc_id); in dcn31_link_encoder_enable_dp_mst_output()
553 DC_LOG_DEBUG("%s: enc_id(%d)\n", __func__, enc->preferred_engine); in dcn31_link_encoder_disable_output()
585 DC_LOG_DEBUG("%s: DPIA(%d) - enc_id(%d)\n", __func__, dpia_control.dpia_id, dpia_control.enc_id); in dcn31_link_encoder_disable_output()
/drivers/gpu/drm/amd/display/dc/dio/dcn10/
A Ddcn10_stream_encoder.c515 DC_LOG_DEBUG("HDMI source set to 24BPP deep color depth\n"); in enc1_stream_encoder_hdmi_set_stream_attribute()
522 DC_LOG_DEBUG("HDMI source 30BPP deep color depth" \ in enc1_stream_encoder_hdmi_set_stream_attribute()
528 DC_LOG_DEBUG("HDMI source 30BPP deep color depth" \ in enc1_stream_encoder_hdmi_set_stream_attribute()
537 DC_LOG_DEBUG("HDMI source 36BPP deep color depth" \ in enc1_stream_encoder_hdmi_set_stream_attribute()
543 DC_LOG_DEBUG("HDMI source 36BPP deep color depth" \ in enc1_stream_encoder_hdmi_set_stream_attribute()
551 DC_LOG_DEBUG("HDMI source deep color depth enabled in" \ in enc1_stream_encoder_hdmi_set_stream_attribute()
/drivers/gpu/drm/amd/display/dc/core/
A Ddc.c1765 DC_LOG_DEBUG("boot timing validation failed due to force_odm_combine\n"); in dc_validate_boot_timing()
1771 DC_LOG_DEBUG("boot timing validation failed due to disabled DIG\n"); in dc_validate_boot_timing()
1822 DC_LOG_DEBUG("boot timing validation failed due to h_total mismatch\n"); in dc_validate_boot_timing()
1852 DC_LOG_DEBUG("boot timing validation failed due to v_total mismatch\n"); in dc_validate_boot_timing()
1883 DC_LOG_DEBUG("boot timing validation failed due to DSC\n"); in dc_validate_boot_timing()
1908 DC_LOG_DEBUG("boot timing validation failed due to pixels_per_cycle\n"); in dc_validate_boot_timing()
1948 DC_LOG_DEBUG("boot timing validation failed due to VSC SDP colorimetry\n"); in dc_validate_boot_timing()
1953 DC_LOG_DEBUG("boot timing validation failed due to DP 128b/132b\n"); in dc_validate_boot_timing()
5680 DC_LOG_DEBUG("%s: disabled\n", __func__); in dc_allow_idle_optimizations_internal()
5701 DC_LOG_DEBUG("%s: %s\n", __func__, allow ? "enabled" : "disabled"); in dc_allow_idle_optimizations_internal()
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A Ddc_link_enc_cfg.c410 DC_LOG_DEBUG("%s: CUR %s(%d) - enc_id(%d)\n", in link_enc_cfg_link_encs_assign()
423 DC_LOG_DEBUG("%s: NEW %s(%d) - enc_id(%d)\n", in link_enc_cfg_link_encs_assign()
743 DC_LOG_DEBUG("%s: current_state(%p) mode(%d)\n", __func__, current_state, LINK_ENC_CFG_TRANSIENT); in link_enc_cfg_set_transient_mode()
/drivers/gpu/drm/amd/display/include/
A Dlogger_types.h33 #define DC_LOG_DEBUG(...) drm_dbg((DC_LOGGER)->dev, __VA_ARGS__) macro
/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/
A Ddcn314_smu.c148 DC_LOG_DEBUG("Watermarks table not configured properly by SMU"); in dcn314_smu_send_msg_with_param()
/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/
A Ddcn31_smu.c132 DC_LOG_DEBUG("Watermarks table not configured properly by SMU"); in dcn31_smu_send_msg_with_param()
/drivers/gpu/drm/amd/display/dc/link/
A Dlink_dpms.c507 DC_LOG_DEBUG("Set retimer failed"); in write_i2c_retimer_setting()
630 DC_LOG_DEBUG("Set default retimer failed"); in write_i2c_default_retimer_setting()
659 DC_LOG_DEBUG("Set redriver failed"); in write_i2c_redriver_setting()
1407 DC_LOG_DEBUG("Unknown encoding format\n"); in deallocate_mst_payload()
2311 DC_LOG_DEBUG("%s, remote_sink=%s, request_bw=%d\n", __func__, in allocate_usb4_bandwidth_for_stream()
2559 DC_LOG_DEBUG("%s, Link%d HPD is pending, not enable it.\n", __func__, link->link_index); in link_set_dpms_on()
/drivers/gpu/drm/amd/display/dc/pg/dcn35/
A Ddcn35_pg_cntl.c238 DC_LOG_DEBUG("HUBP DPP instance %d, power %s", hubp_dpp_inst, in pg_cntl35_hubp_dpp_pg_control()
/drivers/gpu/drm/amd/display/dc/hwss/dcn31/
A Ddcn31_hwseq.c595 DC_LOG_DEBUG("Reset back end for pipe %d, tg:%d\n", in dcn31_reset_back_end_for_pipe()
/drivers/gpu/drm/amd/display/dc/hubbub/dcn31/
A Ddcn31_hubbub.c106 DC_LOG_DEBUG("Set DET%d to %d segments\n", hubp_inst, det_size_segments); in dcn31_program_det_size()
/drivers/gpu/drm/amd/display/dc/hwss/dcn10/
A Ddcn10_hwseq.c993 DC_LOG_DEBUG( in power_on_plane_resources()
1310 DC_LOG_DEBUG("Reset back end for pipe %d, tg:%d\n", in dcn10_reset_back_end_for_pipe()
1474 DC_LOG_DEBUG( in dcn10_plane_atomic_power_down()
/drivers/gpu/drm/amd/display/dc/resource/dcn301/
A Ddcn301_resource.c1593 DC_LOG_DEBUG("%s: fusing pipe %d\n", __func__, i); in dcn301_resource_construct()
/drivers/gpu/drm/amd/display/dc/hwss/dcn401/
A Ddcn401_hwseq.c1870 DC_LOG_DEBUG("Reset back end for pipe %d, tg:%d\n", in dcn401_reset_back_end_for_pipe()
2655 DC_LOG_DEBUG( in dcn401_plane_atomic_power_down()
/drivers/gpu/drm/amd/display/dc/hwss/dcn20/
A Ddcn20_hwseq.c1299 DC_LOG_DEBUG( in dcn20_power_on_plane_resources()
2891 DC_LOG_DEBUG("Reset back end for pipe %d, tg:%d\n", in dcn20_reset_back_end_for_pipe()

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