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Searched refs:DC_OK (Results 1 – 25 of 45) sorted by relevance

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/drivers/gpu/drm/amd/display/dc/link/protocols/
A Dlink_dp_training_dpia.c335 if (status == DC_OK) in dpia_training_cr_non_transparent()
346 if (status != DC_OK) { in dpia_training_cr_non_transparent()
383 if (status != DC_OK) { in dpia_training_cr_non_transparent()
398 if (status != DC_OK) { in dpia_training_cr_non_transparent()
502 if (status != DC_OK) { in dpia_training_cr_transparent()
659 if (status != DC_OK) { in dpia_training_eq_non_transparent()
682 if (status != DC_OK) { in dpia_training_eq_non_transparent()
880 if (status != DC_OK) in dpia_training_end()
885 if (status != DC_OK) in dpia_training_end()
895 if (status != DC_OK) in dpia_training_end()
[all …]
A Dlink_dp_training_128b_132b.c82 enum dc_status status = DC_OK; in dp_perform_128b_132b_channel_eq_done_sequence()
116 if (status != DC_OK) { in dp_perform_128b_132b_channel_eq_done_sequence()
135 if (status != DC_OK) { in dp_perform_128b_132b_channel_eq_done_sequence()
162 enum dc_status status = DC_OK; in dp_perform_128b_132b_cds_done_sequence()
179 if (status != DC_OK) { in dp_perform_128b_132b_cds_done_sequence()
A Dlink_dp_dpia.c51 enum dc_status status = DC_OK; in dpcd_get_tunneling_device_data()
62 if (status != DC_OK) in dpcd_get_tunneling_device_data()
80 if (status != DC_OK) in dpcd_get_tunneling_device_data()
104 if (status != DC_OK) in dpcd_get_tunneling_device_data()
A Dlink_dp_capability.c1073 if (status != DC_OK) { in wake_up_aux_channel()
1091 return DC_OK; in wake_up_aux_channel()
1339 if (status == DC_OK) in dp_overwrite_extended_receiver_cap()
1717 if (status != DC_OK) { in retrieve_link_cap()
1719 if (status == DC_OK) in retrieve_link_cap()
1748 if (status == DC_OK) in retrieve_link_cap()
1753 if (status != DC_OK) { in retrieve_link_cap()
1807 if (status != DC_OK) in retrieve_link_cap()
1822 if (status != DC_OK) in retrieve_link_cap()
1954 if (status != DC_OK) in retrieve_link_cap()
[all …]
A Dlink_dpcd.c56 return DC_OK; in internal_link_read_dpcd()
71 return DC_OK; in internal_link_write_dpcd()
220 if (status != DC_OK) in core_link_read_dpcd()
243 if (status != DC_OK) in core_link_write_dpcd()
A Dlink_edp_panel_control.c78 if (result == DC_OK && in dp_set_panel_mode()
90 ASSERT(result == DC_OK); in dp_set_panel_mode()
195 sizeof(backlight_enable)) != DC_OK) in edp_set_backlight_level_nits()
226 sizeof(dpcd_backlight_set)) != DC_OK) in edp_set_backlight_level_nits()
230 &backlight_control, 1) != DC_OK) in edp_set_backlight_level_nits()
280 &backlight_enable, 1) != DC_OK) in edp_backlight_enable_aux()
460 enum dc_status result = DC_OK; in edp_receiver_ready_T9()
465 if (result == DC_OK && edpRev >= DP_EDP_12) { in edp_receiver_ready_T9()
471 if (result != DC_OK) in edp_receiver_ready_T9()
484 enum dc_status result = DC_OK; in edp_receiver_ready_T7()
[all …]
A Dlink_dp_irq_handler.c110 if (dpcd_result != DC_OK) { in dp_parse_link_loss_status()
301 if (retval == DC_OK) { in dp_handle_tunneling_irq()
326 if (retval == DC_OK) { in read_dpcd204h_on_irq_hpd()
372 if (retval != DC_OK) in dp_read_hpd_rx_irq_data()
441 if (result != DC_OK) { in dp_handle_hpd_rx_irq()
A Dlink_dp_training.c550 return (status != DC_OK && link->ep_type == DISPLAY_ENDPOINT_USB4_DPIA); in dp_check_dpcd_reqeust_status()
622 if (status != DC_OK) { in dp_get_lane_status_and_lane_adjust()
938 if (result == DC_OK) { in configure_lttpr_mode_non_transparent()
952 if (result == DC_OK) { in configure_lttpr_mode_non_transparent()
983 enum dc_status status = DC_OK; in dpcd_configure_lttpr_mode()
1032 if ((core_link_read_dpcd(link, DP_SINK_STATUS, &sink_status, 1) == DC_OK) && in dpcd_exit_training_mode()
1116 if (status != DC_OK) in dpcd_set_link_settings()
1121 if (status != DC_OK) in dpcd_set_link_settings()
1138 if (status != DC_OK) in dpcd_set_link_settings()
1143 if (status != DC_OK) in dpcd_set_link_settings()
[all …]
A Dlink_dp_phy.c146 enum dc_status status = DC_OK; in dp_set_fec_ready()
161 if (status == DC_OK) { in dp_set_fec_ready()
A Dlink_dp_dpia_bw.c232 if (core_link_write_dpcd(link, DPTX_BW_ALLOCATION_MODE_CONTROL, &val, sizeof(uint8_t)) == DC_OK) { in link_dpia_enable_usb4_dp_bw_alloc_mode()
/drivers/gpu/drm/amd/display/dc/link/
A Dlink_dpms.c1423 return DC_OK; in deallocate_mst_payload()
1525 return DC_OK; in allocate_mst_payload()
1620 1) == DC_OK) { in write_128b_132b_sst_payload_allocation_table()
1736 return DC_OK; in update_sst_payload()
1824 return DC_OK; in link_reduce_mst_payload()
1910 return DC_OK; in link_increase_mst_payload()
2124 status = DC_OK; in enable_link_dp()
2191 return DC_OK; in enable_link_dp_mst()
2218 return DC_OK; in enable_link_virtual()
2253 status = DC_OK; in enable_link()
[all …]
A Dlink_validation.c344 return DC_OK; in link_validate_mode_timing()
367 return DC_OK; in link_validate_mode_timing()
396 enum dc_status result = DC_OK; in link_validate_dp_tunnel_bandwidth()
/drivers/gpu/drm/amd/display/dc/resource/dce100/
A Ddce100_resource.c836 return DC_OK; in build_mapped_resource()
861 return DC_OK; in dce100_validate_bandwidth()
891 return DC_OK; in dce100_validate_global()
903 if (result == DC_OK) in dce100_add_stream_to_ctx()
906 if (result == DC_OK) in dce100_add_stream_to_ctx()
925 return DC_OK; in dce100_validate_plane()
/drivers/gpu/drm/amd/display/dc/inc/
A Dcore_status.h32 DC_OK = 1, enumerator
/drivers/gpu/drm/amd/display/dc/hdcp/
A Dhdcp_msg.c281 if (status != DC_OK) in dpcd_access_helper()
305 if (status != DC_OK) in dpcd_access_helper()
/drivers/gpu/drm/amd/display/dc/resource/dcn10/
A Ddcn10_resource.c1057 return DC_OK; in build_mapped_resource()
1069 if (result == DC_OK) in dcn10_add_stream_to_ctx()
1073 if (result == DC_OK) in dcn10_add_stream_to_ctx()
1140 return voltage_supported ? DC_OK : DC_FAIL_BANDWIDTH_VALIDATE; in dcn10_validate_bandwidth()
1150 return DC_OK; in dcn10_validate_plane()
1208 return DC_OK; in dcn10_validate_global()
1224 return DC_OK; in dcn10_patch_unknown_plane_state()
/drivers/gpu/drm/amd/display/dc/resource/dce112/
A Ddce112_resource.c883 return DC_OK; in build_mapped_resource()
955 return result ? DC_OK : DC_FAIL_BANDWIDTH_VALIDATE; in dce112_validate_bandwidth()
990 return DC_OK; in resource_map_phy_clock_resources()
1022 if (result == DC_OK) in dce112_add_stream_to_ctx()
1026 if (result == DC_OK) in dce112_add_stream_to_ctx()
1039 return DC_OK; in dce112_validate_global()
/drivers/gpu/drm/amd/display/dc/resource/dce110/
A Ddce110_resource.c960 return DC_OK; in build_mapped_resource()
1034 return result ? DC_OK : DC_FAIL_BANDWIDTH_VALIDATE; in dce110_validate_bandwidth()
1044 return DC_OK; in dce110_validate_plane()
1099 return DC_OK; in dce110_validate_global()
1111 if (result == DC_OK) in dce110_add_stream_to_ctx()
1115 if (result == DC_OK) in dce110_add_stream_to_ctx()
/drivers/gpu/drm/amd/display/dc/resource/dcn20/
A Ddcn20_resource.c1307 return DC_OK; in build_pipe_hw_param()
1312 enum dc_status status = DC_OK; in dcn20_build_mapped_resource()
1380 enum dc_status result = DC_OK; in dcn20_add_dsc_to_stream_resource()
1429 return DC_OK; in remove_dsc_from_stream_resource()
1439 if (result == DC_OK) in dcn20_add_stream_to_ctx()
1443 if (result == DC_OK && dc_stream->timing.flags.DSC) in dcn20_add_stream_to_ctx()
1446 if (result == DC_OK) in dcn20_add_stream_to_ctx()
1455 enum dc_status result = DC_OK; in dcn20_remove_stream_from_ctx()
2142 return voltage_supported ? DC_OK : DC_FAIL_BANDWIDTH_VALIDATE; in dcn20_validate_bandwidth()
2207 return DC_OK; in dcn20_patch_unknown_plane_state()
/drivers/gpu/drm/amd/display/dc/core/
A Ddc_resource.c1706 return DC_OK; in resource_build_scaling_params_for_context()
3974 return DC_OK; in resource_map_pool_resources()
4197 if (res != DC_OK) in dc_validate_with_context()
4220 if (res != DC_OK) in dc_validate_with_context()
4256 if (res != DC_OK) in dc_validate_with_context()
4324 if (result != DC_OK) in dc_validate_global_state()
4372 if (result == DC_OK) in dc_validate_global_state()
4866 return DC_OK; in resource_map_clock_resources()
5076 if (res == DC_OK) { in dc_validate_stream()
5085 if (res == DC_OK) in dc_validate_stream()
[all …]
A Ddc_state.c393 if (res != DC_OK) in dc_state_add_stream()
447 return DC_OK; in dc_state_remove_stream()
795 if (res == DC_OK && !dc_state_is_phantom_stream_tracked(state, phantom_stream)) { in dc_state_add_phantom_stream()
A Ddc_debug.c217 case DC_OK: in dc_status_to_str()
/drivers/gpu/drm/amd/display/dc/link/hwss/
A Dlink_hwss_dpia.c52 ASSERT(status == DC_OK); in update_dpia_stream_allocation_table()
/drivers/gpu/drm/amd/display/amdgpu_dm/
A Damdgpu_dm_mst_types.c1480 res_pool->funcs->remove_stream_from_ctx(stream->ctx->dc, dc_state, stream) != DC_OK) in compute_mst_dsc_configs_for_state()
1502 if (dc_stream_add_dsc_to_resource(stream->ctx->dc, dc_state, stream) != DC_OK) { in compute_mst_dsc_configs_for_state()
1837 return DC_OK; in dm_dp_mst_is_port_support_mode()
1938 return DC_OK; in dm_dp_mst_is_port_support_mode()
/drivers/gpu/drm/amd/display/dc/resource/dcn401/
A Ddcn401_resource.c1633 return DC_OK; in dcn401_patch_unknown_plane_state()
1641 enum dc_status status = DC_OK; in dcn401_validate_bandwidth()
1656 validate_mode) ? DC_OK : DC_FAIL_BANDWIDTH_VALIDATE; in dcn401_validate_bandwidth()
1658 …if (validate_mode == DC_VALIDATE_MODE_AND_PROGRAMMING && status == DC_OK && dc_state_is_subvp_in_u… in dcn401_validate_bandwidth()
1678 validate_mode) ? DC_OK : DC_FAIL_BANDWIDTH_VALIDATE; in dcn401_validate_bandwidth()

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