| /drivers/clk/renesas/ |
| A D | r9a09g057-cpg.c | 378 DEF_RST(3, 0, 1, 1), /* SYS_0_PRESETN */
390 DEF_RST(7, 0, 3, 1), /* GTM_3_PRESETZ */
391 DEF_RST(7, 1, 3, 2), /* GTM_4_PRESETZ */
392 DEF_RST(7, 2, 3, 3), /* GTM_5_PRESETZ */
393 DEF_RST(7, 3, 3, 4), /* GTM_6_PRESETZ */
395 DEF_RST(7, 5, 3, 6), /* WDT_0_RESET */
396 DEF_RST(7, 6, 3, 7), /* WDT_1_RESET */
397 DEF_RST(7, 7, 3, 8), /* WDT_2_RESET */
398 DEF_RST(7, 8, 3, 9), /* WDT_3_RESET */
406 DEF_RST(9, 8, 4, 9), /* RIIC_0_MRST */
[all …]
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| A D | r9a07g044-cpg.c | 429 DEF_RST(R9A07G044_GPT_RST_C, 0x840, 0),
436 DEF_RST(R9A07G044_SPI_RST, 0x850, 0),
459 DEF_RST(R9A07G044_I2C0_MRST, 0x880, 0),
460 DEF_RST(R9A07G044_I2C1_MRST, 0x880, 1),
461 DEF_RST(R9A07G044_I2C2_MRST, 0x880, 2),
462 DEF_RST(R9A07G044_I2C3_MRST, 0x880, 3),
468 DEF_RST(R9A07G044_SCI0_RST, 0x888, 0),
469 DEF_RST(R9A07G044_SCI1_RST, 0x888, 1),
470 DEF_RST(R9A07G044_RSPI0_RST, 0x890, 0),
471 DEF_RST(R9A07G044_RSPI1_RST, 0x890, 1),
[all …]
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| A D | r9a07g043-cpg.c | 323 DEF_RST(R9A07G043_SPI_RST, 0x850, 0),
342 DEF_RST(R9A07G043_I2C0_MRST, 0x880, 0),
343 DEF_RST(R9A07G043_I2C1_MRST, 0x880, 1),
344 DEF_RST(R9A07G043_I2C2_MRST, 0x880, 2),
345 DEF_RST(R9A07G043_I2C3_MRST, 0x880, 3),
351 DEF_RST(R9A07G043_SCI0_RST, 0x888, 0),
352 DEF_RST(R9A07G043_SCI1_RST, 0x888, 1),
353 DEF_RST(R9A07G043_RSPI0_RST, 0x890, 0),
354 DEF_RST(R9A07G043_RSPI1_RST, 0x890, 1),
355 DEF_RST(R9A07G043_RSPI2_RST, 0x890, 2),
[all …]
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| A D | r9a09g056-cpg.c | 295 DEF_RST(3, 0, 1, 1), /* SYS_0_PRESETN */
301 DEF_RST(7, 0, 3, 1), /* GTM_3_PRESETZ */
302 DEF_RST(7, 1, 3, 2), /* GTM_4_PRESETZ */
303 DEF_RST(7, 2, 3, 3), /* GTM_5_PRESETZ */
304 DEF_RST(7, 3, 3, 4), /* GTM_6_PRESETZ */
306 DEF_RST(7, 5, 3, 6), /* WDT_0_RESET */
307 DEF_RST(7, 6, 3, 7), /* WDT_1_RESET */
308 DEF_RST(7, 7, 3, 8), /* WDT_2_RESET */
309 DEF_RST(7, 8, 3, 9), /* WDT_3_RESET */
311 DEF_RST(9, 8, 4, 9), /* RIIC_0_MRST */
[all …]
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| A D | r9a09g047-cpg.c | 302 DEF_RST(3, 0, 1, 1), /* SYS_0_PRESETN */
306 DEF_RST(7, 6, 3, 7), /* WDT_1_RESET */
307 DEF_RST(7, 7, 3, 8), /* WDT_2_RESET */
308 DEF_RST(7, 8, 3, 9), /* WDT_3_RESET */
310 DEF_RST(9, 6, 4, 7), /* I3C_0_PRESETN */
311 DEF_RST(9, 7, 4, 8), /* I3C_0_TRESETN */
312 DEF_RST(9, 8, 4, 9), /* RIIC_0_MRST */
313 DEF_RST(9, 9, 4, 10), /* RIIC_1_MRST */
314 DEF_RST(9, 10, 4, 11), /* RIIC_2_MRST */
315 DEF_RST(9, 11, 4, 12), /* RIIC_3_MRST */
[all …]
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| A D | r9a08g045-cpg.c | 301 DEF_RST(R9A08G045_IA55_RESETN, 0x818, 0),
305 DEF_RST(R9A08G045_SDHI0_IXRST, 0x854, 0),
306 DEF_RST(R9A08G045_SDHI1_IXRST, 0x854, 1),
307 DEF_RST(R9A08G045_SDHI2_IXRST, 0x854, 2),
315 DEF_RST(R9A08G045_USB_PRESETN, 0x878, 3),
318 DEF_RST(R9A08G045_I2C0_MRST, 0x880, 0),
319 DEF_RST(R9A08G045_I2C1_MRST, 0x880, 1),
320 DEF_RST(R9A08G045_I2C2_MRST, 0x880, 2),
321 DEF_RST(R9A08G045_I2C3_MRST, 0x880, 3),
328 DEF_RST(R9A08G045_GPIO_RSTN, 0x898, 0),
[all …]
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| A D | r9a09g011-cpg.c | 215 DEF_RST(R9A09G011_PFC_PRESETN, 0x600, 2),
219 DEF_RST(R9A09G011_USB_PRESET_N, 0x608, 7),
220 DEF_RST(R9A09G011_USB_DRD_RESET, 0x608, 8),
221 DEF_RST(R9A09G011_USB_ARESETN_P, 0x608, 9),
222 DEF_RST(R9A09G011_USB_ARESETN_H, 0x608, 10),
225 DEF_RST(R9A09G011_TIM_GPB_PRESETN, 0x614, 1),
226 DEF_RST(R9A09G011_TIM_GPC_PRESETN, 0x614, 2),
230 DEF_RST(R9A09G011_IIC_GPA_PRESETN, 0x614, 8),
231 DEF_RST(R9A09G011_IIC_GPB_PRESETN, 0x614, 9),
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| A D | rzv2h-cpg.h | 301 #define DEF_RST(_resindex, _resbit, _monindex, _monbit) \ macro
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| A D | rzg2l-cpg.h | 257 #define DEF_RST(_id, _off, _bit) \ macro
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