Searched refs:DISP_ENABLE (Results 1 – 5 of 5) sorted by relevance
| /drivers/gpu/drm/i915/display/ |
| A D | i9xx_plane_regs.h | 16 #define DISP_ENABLE REG_BIT(31) macro
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| A D | i9xx_plane.c | 166 dspcntr = DISP_ENABLE; in i9xx_plane_ctl()
745 ret = val & DISP_ENABLE; in i9xx_plane_get_hw_state()
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| A D | intel_display.c | 8300 intel_de_read(display, DSPCNTR(display, PLANE_A)) & DISP_ENABLE); in i830_disable_pipe()
8302 intel_de_read(display, DSPCNTR(display, PLANE_B)) & DISP_ENABLE); in i830_disable_pipe()
8304 intel_de_read(display, DSPCNTR(display, PLANE_C)) & DISP_ENABLE); in i830_disable_pipe()
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| /drivers/gpu/drm/i915/gvt/ |
| A D | fb_decoder.c | 225 plane->enabled = !!(val & DISP_ENABLE); in intel_vgpu_decode_primary_plane()
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| A D | display.c | 204 vgpu_vreg_t(vgpu, DSPCNTR(display, pipe)) &= ~DISP_ENABLE; in emulate_monitor_status_change()
518 vgpu_vreg_t(vgpu, DSPCNTR(display, pipe)) &= ~DISP_ENABLE; in emulate_monitor_status_change()
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