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Searched refs:DMAR_IQT_REG (Results 1 – 3 of 3) sorted by relevance

/drivers/iommu/intel/
A Ddmar.c1318 tail = readl(iommu->reg + DMAR_IQT_REG); in qi_check_fault()
1446 writel(qi->free_head << shift, iommu->reg + DMAR_IQT_REG); in qi_submit_sync()
1626 while ((readl(iommu->reg + DMAR_IQT_REG) != in dmar_disable_qi()
1663 writel(0, iommu->reg + DMAR_IQT_REG); in __dmar_enable_qi()
A Ddebugfs.c531 dmar_readq(iommu->reg + DMAR_IQT_REG) >> shift); in invalidation_queue_show()
A Diommu.h87 #define DMAR_IQT_REG 0x88 /* Invalidation queue tail register */ macro

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