Searched refs:DMA_BUS_MODE (Results 1 – 10 of 10) sorted by relevance
| /drivers/net/ethernet/stmicro/stmmac/ |
| A D | dwmac100_dma.c | 26 ioaddr + DMA_BUS_MODE); in dwmac100_dma_init()
75 reg_space[DMA_BUS_MODE / 4 + i] = in dwmac100_dump_dma_regs()
76 readl(ioaddr + DMA_BUS_MODE + i * 4); in dwmac100_dump_dma_regs()
|
| A D | dwmac-imx.c | 42 #define DMA_BUS_MODE 0x00001000 macro
271 u32 value = readl(ioaddr + DMA_BUS_MODE); in imx_dwmac_mx93_reset()
275 writel(value, ioaddr + DMA_BUS_MODE); in imx_dwmac_mx93_reset()
282 return readl_poll_timeout(ioaddr + DMA_BUS_MODE, value, in imx_dwmac_mx93_reset()
|
| A D | dwmac_lib.c | 19 u32 value = readl(ioaddr + DMA_BUS_MODE); in dwmac_dma_reset()
23 writel(value, ioaddr + DMA_BUS_MODE); in dwmac_dma_reset()
25 return readl_poll_timeout(ioaddr + DMA_BUS_MODE, value, in dwmac_dma_reset()
|
| A D | dwmac4_lib.c | 18 u32 value = readl(ioaddr + DMA_BUS_MODE); in dwmac4_dma_reset()
22 writel(value, ioaddr + DMA_BUS_MODE); in dwmac4_dma_reset()
24 return readl_poll_timeout(ioaddr + DMA_BUS_MODE, value, in dwmac4_dma_reset()
|
| A D | dwmac_dma.h | 15 #define DMA_BUS_MODE 0x00001000 /* Bus Mode */ macro
33 #define DMA_CHAN_BUS_MODE(chan) dma_chan_base_addr(DMA_BUS_MODE, chan)
|
| A D | dwmac1000_dma.c | 224 reg_space[DMA_BUS_MODE / 4 + i] = in dwmac1000_dump_dma_regs()
225 readl(ioaddr + DMA_BUS_MODE + i * 4); in dwmac1000_dump_dma_regs()
|
| A D | dwmac-loongson.c | 514 u32 value = readl(ioaddr + DMA_BUS_MODE); in loongson_dwmac_fix_reset()
517 writel(value, ioaddr + DMA_BUS_MODE); in loongson_dwmac_fix_reset()
519 return readl_poll_timeout(ioaddr + DMA_BUS_MODE, value, in loongson_dwmac_fix_reset()
|
| A D | dwmac4_dma.c | 176 value = readl(ioaddr + DMA_BUS_MODE); in dwmac4_dma_init()
186 writel(value, ioaddr + DMA_BUS_MODE); in dwmac4_dma_init()
|
| A D | dwmac4_dma.h | 18 #define DMA_BUS_MODE 0x00001000 macro
|
| A D | stmmac_ethtool.c | 433 ®_space[DMA_BUS_MODE / 4], in stmmac_ethtool_gregs()
|
Completed in 19 milliseconds