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Searched refs:DMA_CONTROL (Results 1 – 6 of 6) sorted by relevance

/drivers/net/ethernet/stmicro/stmmac/
A Ddwmac100_dma.c57 u32 csr6 = readl(ioaddr + DMA_CONTROL); in dwmac100_dma_operation_mode_tx()
66 writel(csr6, ioaddr + DMA_CONTROL); in dwmac100_dma_operation_mode_tx()
A Ddwmac_lib.c245 u32 csr6 = readl(ioaddr + DMA_CONTROL); in dwmac_dma_flush_tx_fifo()
246 writel((csr6 | DMA_CONTROL_FTF), ioaddr + DMA_CONTROL); in dwmac_dma_flush_tx_fifo()
248 do {} while ((readl(ioaddr + DMA_CONTROL) & DMA_CONTROL_FTF)); in dwmac_dma_flush_tx_fifo()
A Ddwmac_dma.h21 #define DMA_CONTROL 0x00001018 /* Ctrl (Operational Mode) */ macro
43 #define DMA_CHAN_CONTROL(chan) dma_chan_base_addr(DMA_CONTROL, chan)
/drivers/memstick/host/
A Djmb38x_ms.c26 DMA_CONTROL = 0x08, enumerator
431 writel(DMA_CONTROL_ENABLE, host->addr + DMA_CONTROL); in jmb38x_ms_issue_cmd()
483 writel(0, host->addr + DMA_CONTROL); in jmb38x_ms_complete_cmd()
/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/
A Drpcfn.h42 X(RM, DMA_CONTROL) //26
/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/nvrm/
A Drpcfn.h42 X(RM, DMA_CONTROL, 26) // deprecated

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