Searched refs:DMA_CTRL (Results 1 – 10 of 10) sorted by relevance
| /drivers/dma/lgm/ |
| A D | lgm-dma.c | 37 #define DMA_CTRL 0x0010 macro
332 ldma_update_bits(d, mask, val, DMA_CTRL); in ldma_dev_pkt_arb_cfg()
343 ldma_update_bits(d, mask, val, DMA_CTRL); in ldma_dev_sram_desc_cfg()
359 ldma_update_bits(d, mask, val, DMA_CTRL); in ldma_dev_chan_flow_ctl_cfg()
388 ldma_update_bits(d, mask, val, DMA_CTRL); in ldma_dev_desc_fetch_on_demand_cfg()
399 ldma_update_bits(d, mask, val, DMA_CTRL); in ldma_dev_byte_enable_cfg()
433 ldma_update_bits(d, mask, val, DMA_CTRL); in ldma_dev_df_tout_cfg()
449 ldma_update_bits(d, mask, val, DMA_CTRL); in ldma_dev_dburst_wr_cfg()
465 ldma_update_bits(d, mask, val, DMA_CTRL); in ldma_dev_vld_fetch_ack_cfg()
476 ldma_update_bits(d, mask, val, DMA_CTRL); in ldma_dev_drb_cfg()
[all …]
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| /drivers/net/ethernet/broadcom/genet/ |
| A D | bcmgenet.c | 182 DMA_CTRL, enumerator
218 [DMA_CTRL] = 0x04,
254 [DMA_CTRL] = 0x04,
281 [DMA_CTRL] = 0x00,
2843 reg = bcmgenet_tdma_readl(priv, DMA_CTRL); in bcmgenet_tdma_disable()
2847 bcmgenet_tdma_writel(priv, reg, DMA_CTRL); in bcmgenet_tdma_disable()
2866 reg = bcmgenet_rdma_readl(priv, DMA_CTRL); in bcmgenet_rdma_disable()
2870 bcmgenet_rdma_writel(priv, reg, DMA_CTRL); in bcmgenet_rdma_disable()
3129 reg = bcmgenet_rdma_readl(priv, DMA_CTRL); in bcmgenet_init_dma()
3131 bcmgenet_rdma_writel(priv, reg, DMA_CTRL); in bcmgenet_init_dma()
[all …]
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| /drivers/net/ethernet/oki-semi/pch_gbe/ |
| A D | pch_gbe_main.c | 794 dctrl = ioread32(&hw->reg->DMA_CTRL); in pch_gbe_configure_tx()
796 iowrite32(dctrl, &hw->reg->DMA_CTRL); in pch_gbe_configure_tx()
839 rxdma = ioread32(&hw->reg->DMA_CTRL); in pch_gbe_configure_rx()
841 iowrite32(rxdma, &hw->reg->DMA_CTRL); in pch_gbe_configure_rx()
846 ioread32(&hw->reg->DMA_CTRL)); in pch_gbe_configure_rx()
1226 rxdma = ioread32(&hw->reg->DMA_CTRL); in pch_gbe_disable_dma_rx()
1228 iowrite32(rxdma, &hw->reg->DMA_CTRL); in pch_gbe_disable_dma_rx()
1236 rxdma = ioread32(&hw->reg->DMA_CTRL); in pch_gbe_enable_dma_rx()
1238 iowrite32(rxdma, &hw->reg->DMA_CTRL); in pch_gbe_enable_dma_rx()
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| A D | pch_gbe.h | 68 u32 DMA_CTRL; member
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| /drivers/gpu/drm/i915/gt/uc/ |
| A D | intel_guc_reg.h | 52 #define DMA_CTRL _MMIO(0xc314) macro
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| A D | intel_uc_fw.c | 1115 intel_uncore_write_fw(uncore, DMA_CTRL, in uc_fw_xfer()
1119 ret = intel_wait_for_register_fw(uncore, DMA_CTRL, START_DMA, 0, 100, NULL); in uc_fw_xfer()
1123 intel_uncore_read_fw(uncore, DMA_CTRL)); in uc_fw_xfer()
1126 intel_uncore_write_fw(uncore, DMA_CTRL, _MASKED_BIT_DISABLE(dma_flags)); in uc_fw_xfer()
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| /drivers/gpu/drm/xe/regs/ |
| A D | xe_guc_regs.h | 77 #define DMA_CTRL XE_REG(0xc314) macro
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| /drivers/gpu/drm/xe/ |
| A D | xe_uc_fw.c | 876 xe_mmio_write32(mmio, DMA_CTRL, in uc_fw_xfer()
880 ret = xe_mmio_wait32(mmio, DMA_CTRL, START_DMA, 0, 100000, &dma_ctrl, in uc_fw_xfer()
887 xe_mmio_write32(mmio, DMA_CTRL, _MASKED_BIT_DISABLE(dma_flags)); in uc_fw_xfer()
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| /drivers/gpu/drm/i915/ |
| A D | intel_gvt_mmio_table.c | 1072 MMIO_D(DMA_CTRL); in iterate_skl_plus_mmio()
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| /drivers/gpu/drm/i915/gvt/ |
| A D | handlers.c | 2759 MMIO_DH(DMA_CTRL, D_SKL_PLUS, NULL, dma_ctrl_write); in init_skl_mmio_info()
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