| /drivers/gpu/drm/amd/display/dc/pg/dcn35/ |
| A D | dcn35_pg_cntl.h | 37 SR(DOMAIN16_PG_CONFIG), \
71 PG_CNTL_SF(DOMAIN16_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
72 PG_CNTL_SF(DOMAIN16_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
143 uint32_t DOMAIN16_PG_CONFIG; member
|
| A D | dcn35_pg_cntl.c | 109 REG_UPDATE(DOMAIN16_PG_CONFIG, in pg_cntl35_dsc_pg_control()
|
| /drivers/gpu/drm/amd/display/dc/hwss/dce/ |
| A D | dce_hwseq.h | 289 SR(DOMAIN16_PG_CONFIG), \
349 SR(DOMAIN16_PG_CONFIG), \
457 SR(DOMAIN16_PG_CONFIG), \
511 SR(DOMAIN16_PG_CONFIG), \
610 uint32_t DOMAIN16_PG_CONFIG; member
866 HWS_SF(, DOMAIN16_PG_CONFIG, DOMAIN16_POWER_FORCEON, mask_sh), \
867 HWS_SF(, DOMAIN16_PG_CONFIG, DOMAIN16_POWER_GATE, mask_sh), \
919 HWS_SF(, DOMAIN16_PG_CONFIG, DOMAIN16_POWER_FORCEON, mask_sh), \
920 HWS_SF(, DOMAIN16_PG_CONFIG, DOMAIN16_POWER_GATE, mask_sh), \
972 HWS_SF(, DOMAIN16_PG_CONFIG, DOMAIN16_POWER_GATE, mask_sh), \
[all …]
|
| /drivers/gpu/drm/amd/display/dc/hwss/dcn302/ |
| A D | dcn302_hwseq.c | 168 if (REG(DOMAIN16_PG_CONFIG) == 0) in dcn302_dsc_pg_control()
177 REG_UPDATE(DOMAIN16_PG_CONFIG, in dcn302_dsc_pg_control()
|
| /drivers/gpu/drm/amd/display/dc/resource/dcn36/ |
| A D | dcn36_resource.h | 55 SR(DOMAIN16_PG_CONFIG), \
|
| A D | dcn36_resource.c | 550 HWS_SF(, DOMAIN16_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
551 HWS_SF(, DOMAIN16_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
|
| /drivers/gpu/drm/amd/display/dc/hwss/dcn314/ |
| A D | dcn314_hwseq.c | 248 REG_UPDATE(DOMAIN16_PG_CONFIG, in dcn314_dsc_pg_control()
318 REG_UPDATE(DOMAIN16_PG_CONFIG, DOMAIN_POWER_FORCEON, force_on); in dcn314_enable_power_gating_plane()
|
| /drivers/gpu/drm/amd/display/dc/hwss/dcn31/ |
| A D | dcn31_hwseq.c | 305 REG_UPDATE(DOMAIN16_PG_CONFIG, in dcn31_dsc_pg_control()
370 REG_UPDATE(DOMAIN16_PG_CONFIG, DOMAIN_POWER_FORCEON, force_on); in dcn31_enable_power_gating_plane()
|
| /drivers/gpu/drm/amd/display/dc/resource/dcn316/ |
| A D | dcn316_resource.c | 708 SR(DOMAIN16_PG_CONFIG), \
745 HWS_SF(, DOMAIN16_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
746 HWS_SF(, DOMAIN16_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
|
| /drivers/gpu/drm/amd/display/dc/resource/dcn35/ |
| A D | dcn35_resource.h | 199 SR(DOMAIN16_PG_CONFIG), \
|
| A D | dcn35_resource.c | 569 HWS_SF(, DOMAIN16_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
570 HWS_SF(, DOMAIN16_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
|
| /drivers/gpu/drm/amd/display/dc/resource/dcn314/ |
| A D | dcn314_resource.c | 721 SR(DOMAIN16_PG_CONFIG), \
760 HWS_SF(, DOMAIN16_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
761 HWS_SF(, DOMAIN16_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
|
| /drivers/gpu/drm/amd/display/dc/resource/dcn31/ |
| A D | dcn31_resource.c | 714 SR(DOMAIN16_PG_CONFIG), \
751 HWS_SF(, DOMAIN16_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
752 HWS_SF(, DOMAIN16_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
|
| /drivers/gpu/drm/amd/display/dc/resource/dcn321/ |
| A D | dcn321_resource.c | 561 SR(DOMAIN16_PG_CONFIG), \
599 HWS_SF(, DOMAIN16_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
600 HWS_SF(, DOMAIN16_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
|
| /drivers/gpu/drm/amd/display/dc/resource/dcn315/ |
| A D | dcn315_resource.c | 713 SR(DOMAIN16_PG_CONFIG), \
750 HWS_SF(, DOMAIN16_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
751 HWS_SF(, DOMAIN16_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
|
| /drivers/gpu/drm/amd/display/dc/resource/dcn401/ |
| A D | dcn401_resource.c | 540 SR(DOMAIN16_PG_CONFIG), \
581 HWS_SF(, DOMAIN16_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
582 HWS_SF(, DOMAIN16_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
|
| /drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
| A D | dcn32_resource.c | 565 SR(DOMAIN16_PG_CONFIG), \
603 HWS_SF(, DOMAIN16_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
604 HWS_SF(, DOMAIN16_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
|
| /drivers/gpu/drm/amd/display/dc/hwss/dcn35/ |
| A D | dcn35_hwseq.c | 522 REG_UPDATE(DOMAIN16_PG_CONFIG, in dcn35_dsc_pg_control()
586 REG_UPDATE(DOMAIN16_PG_CONFIG, DOMAIN_POWER_FORCEON, force_on); in dcn35_enable_power_gating_plane()
|
| /drivers/gpu/drm/amd/display/dc/hwss/dcn32/ |
| A D | dcn32_hwseq.c | 92 REG_UPDATE(DOMAIN16_PG_CONFIG, in dcn32_dsc_pg_control()
154 REG_UPDATE(DOMAIN16_PG_CONFIG, DOMAIN_POWER_FORCEON, force_on); in dcn32_enable_power_gating_plane()
|
| /drivers/gpu/drm/amd/display/dc/resource/dcn351/ |
| A D | dcn351_resource.c | 549 HWS_SF(, DOMAIN16_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
550 HWS_SF(, DOMAIN16_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
|
| /drivers/gpu/drm/amd/display/dc/hwss/dcn20/ |
| A D | dcn20_hwseq.c | 342 REG_UPDATE(DOMAIN16_PG_CONFIG, DOMAIN16_POWER_FORCEON, force_on); in dcn20_enable_power_gating_plane()
486 if (REG(DOMAIN16_PG_CONFIG) == 0) in dcn20_dsc_pg_control()
495 REG_UPDATE(DOMAIN16_PG_CONFIG, in dcn20_dsc_pg_control()
|