Searched refs:DOMAIN24_PG_STATUS (Results 1 – 7 of 7) sorted by relevance
| /drivers/gpu/drm/amd/display/dc/pg/dcn35/ |
| A D | dcn35_pg_cntl.h | 55 SR(DOMAIN24_PG_STATUS), \
107 PG_CNTL_SF(DOMAIN24_PG_STATUS, DOMAIN_DESIRED_PWR_STATE, mask_sh), \
108 PG_CNTL_SF(DOMAIN24_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, mask_sh), \
161 uint32_t DOMAIN24_PG_STATUS; member
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| A D | dcn35_pg_cntl.c | 350 REG_GET(DOMAIN24_PG_STATUS, in pg_cntl35_plane_otg_status()
441 REG_WAIT(DOMAIN24_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, pwr_status, 1, 1000); in pg_cntl35_plane_otg_pg_control()
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| /drivers/gpu/drm/amd/display/dc/resource/dcn401/ |
| A D | dcn401_resource.c | 558 SR(DOMAIN24_PG_STATUS), \
607 HWS_SF(, DOMAIN24_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, mask_sh), \
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| /drivers/gpu/drm/amd/display/dc/hwss/dce/ |
| A D | dce_hwseq.h | 701 uint32_t DOMAIN24_PG_STATUS; member
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| /drivers/gpu/drm/amd/display/dc/resource/dcn35/ |
| A D | dcn35_resource.c | 595 HWS_SF(, DOMAIN24_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, mask_sh), \
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| /drivers/gpu/drm/amd/display/dc/resource/dcn351/ |
| A D | dcn351_resource.c | 575 HWS_SF(, DOMAIN24_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, mask_sh), \
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| /drivers/gpu/drm/amd/display/dc/resource/dcn36/ |
| A D | dcn36_resource.c | 576 HWS_SF(, DOMAIN24_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, mask_sh), \
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Completed in 27 milliseconds