Searched refs:DPG_PIPE_ARBITRATION_CONTROL3 (Results 1 – 4 of 4) sorted by relevance
| /drivers/gpu/drm/amd/display/dc/dce/ |
| A D | dce_mem_input.h | 79 SRI(DPG_PIPE_ARBITRATION_CONTROL3, DMIF_PG, id),\
133 uint32_t DPG_PIPE_ARBITRATION_CONTROL3; member
251 SFB(blk, DPG_PIPE_ARBITRATION_CONTROL3, URGENCY_WATERMARK_MASK, mask_sh),\
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| A D | dce_mem_input.c | 184 REG_UPDATE(DPG_PIPE_ARBITRATION_CONTROL3, in dce60_program_urgency_watermark()
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| /drivers/gpu/drm/radeon/ |
| A D | si.c | 2411 arb_control3 = RREG32(DPG_PIPE_ARBITRATION_CONTROL3 + radeon_crtc->crtc_offset); in dce6_program_watermarks()
2415 WREG32(DPG_PIPE_ARBITRATION_CONTROL3 + radeon_crtc->crtc_offset, tmp); in dce6_program_watermarks()
2420 tmp = RREG32(DPG_PIPE_ARBITRATION_CONTROL3 + radeon_crtc->crtc_offset); in dce6_program_watermarks()
2423 WREG32(DPG_PIPE_ARBITRATION_CONTROL3 + radeon_crtc->crtc_offset, tmp); in dce6_program_watermarks()
2428 WREG32(DPG_PIPE_ARBITRATION_CONTROL3 + radeon_crtc->crtc_offset, arb_control3); in dce6_program_watermarks()
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| A D | sid.h | 797 #define DPG_PIPE_ARBITRATION_CONTROL3 0x6cc8 macro
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