Searched refs:DPIO_PHY1 (Results 1 – 9 of 9) sorted by relevance
| /drivers/gpu/drm/i915/ |
| A D | intel_gvt_mmio_table.c | 1139 MMIO_D(BXT_PHY_CTL_FAMILY(DPIO_PHY1)); in iterate_bxt_mmio()
1155 MMIO_D(BXT_PORT_CL1CM_DW0(DPIO_PHY1)); in iterate_bxt_mmio()
1156 MMIO_D(BXT_PORT_CL1CM_DW9(DPIO_PHY1)); in iterate_bxt_mmio()
1157 MMIO_D(BXT_PORT_CL1CM_DW10(DPIO_PHY1)); in iterate_bxt_mmio()
1158 MMIO_D(BXT_PORT_CL1CM_DW28(DPIO_PHY1)); in iterate_bxt_mmio()
1159 MMIO_D(BXT_PORT_CL1CM_DW30(DPIO_PHY1)); in iterate_bxt_mmio()
1160 MMIO_D(BXT_PORT_CL2CM_DW6(DPIO_PHY1)); in iterate_bxt_mmio()
1161 MMIO_D(BXT_PORT_REF_DW3(DPIO_PHY1)); in iterate_bxt_mmio()
1162 MMIO_D(BXT_PORT_REF_DW6(DPIO_PHY1)); in iterate_bxt_mmio()
1163 MMIO_D(BXT_PORT_REF_DW8(DPIO_PHY1)); in iterate_bxt_mmio()
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| /drivers/gpu/drm/i915/display/ |
| A D | intel_display_power_well.c | 1370 if (!display->power.chv_phy_assert[DPIO_PHY1]) in assert_chv_phy_status()
1372 PHY_STATUS_SPLINE_LDO(DPIO_PHY1, DPIO_CH0, 0) | in assert_chv_phy_status()
1373 PHY_STATUS_SPLINE_LDO(DPIO_PHY1, DPIO_CH0, 1)); in assert_chv_phy_status()
1417 phy_status |= PHY_POWERGOOD(DPIO_PHY1); in assert_chv_phy_status()
1424 PHY_CH_POWER_DOWN_OVRD(0xf, DPIO_PHY1, DPIO_CH0))) in assert_chv_phy_status()
1425 phy_status |= PHY_STATUS_CMN_LDO(DPIO_PHY1, DPIO_CH0); in assert_chv_phy_status()
1428 PHY_CH_POWER_DOWN_OVRD(0x3, DPIO_PHY1, DPIO_CH0))) in assert_chv_phy_status()
1429 phy_status |= PHY_STATUS_SPLINE_LDO(DPIO_PHY1, DPIO_CH0, 0); in assert_chv_phy_status()
1431 PHY_CH_POWER_DOWN_OVRD(0xc, DPIO_PHY1, DPIO_CH0))) in assert_chv_phy_status()
1465 phy = DPIO_PHY1; in chv_dpio_cmn_power_well_enable()
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| A D | intel_dpio_phy.c | 172 .rcomp_phy = DPIO_PHY1,
180 [DPIO_PHY1] = {
194 .rcomp_phy = DPIO_PHY1,
202 [DPIO_PHY1] = {
214 .rcomp_phy = DPIO_PHY1,
683 return DPIO_PHY1; in vlv_dig_port_to_phy()
697 return DPIO_PHY1; in vlv_pipe_to_phy()
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| A D | intel_display_power.c | 1784 PHY_LDO_SEQ_DELAY(PHY_LDO_DELAY_600NS, DPIO_PHY1) | in chv_phy_control_init()
1787 PHY_CH_POWER_MODE(PHY_CH_DEEP_PSR, DPIO_PHY1, DPIO_CH0); in chv_phy_control_init()
1837 PHY_CH_POWER_DOWN_OVRD_EN(DPIO_PHY1, DPIO_CH0); in chv_phy_control_init()
1840 PHY_CH_POWER_DOWN_OVRD(mask, DPIO_PHY1, DPIO_CH0); in chv_phy_control_init()
1842 display->power.chv_phy_control |= PHY_COM_LANE_RESET_DEASSERT(DPIO_PHY1); in chv_phy_control_init()
1844 display->power.chv_phy_assert[DPIO_PHY1] = false; in chv_phy_control_init()
1846 display->power.chv_phy_assert[DPIO_PHY1] = true; in chv_phy_control_init()
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| A D | intel_dpio_phy.h | 25 DPIO_PHY1, enumerator
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| A D | intel_display_power_map.c | 478 .bxt.phy = DPIO_PHY1,
581 .bxt.phy = DPIO_PHY1,
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| /drivers/gpu/drm/i915/gvt/ |
| A D | mmio.c | 269 vgpu_vreg_t(vgpu, BXT_PORT_CL1CM_DW0(DPIO_PHY1)) &= in intel_vgpu_reset_mmio()
273 vgpu_vreg_t(vgpu, BXT_PHY_CTL_FAMILY(DPIO_PHY1)) &= in intel_vgpu_reset_mmio()
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| A D | display.c | 249 vgpu_vreg_t(vgpu, BXT_PORT_CL1CM_DW0(DPIO_PHY1)) &= in emulate_monitor_status_change()
252 vgpu_vreg_t(vgpu, BXT_PHY_CTL_FAMILY(DPIO_PHY1)) &= ~BIT(30); in emulate_monitor_status_change()
281 vgpu_vreg_t(vgpu, BXT_PORT_CL1CM_DW0(DPIO_PHY1)) |= in emulate_monitor_status_change()
283 vgpu_vreg_t(vgpu, BXT_PHY_CTL_FAMILY(DPIO_PHY1)) |= in emulate_monitor_status_change()
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| A D | handlers.c | 561 phy = DPIO_PHY1; in bxt_vgpu_get_dp_bitrate()
1907 vgpu_vreg_t(vgpu, BXT_PORT_CL1CM_DW0(DPIO_PHY1)) &= in bxt_gt_disp_pwron_write()
1909 vgpu_vreg_t(vgpu, BXT_PORT_CL1CM_DW0(DPIO_PHY1)) |= in bxt_gt_disp_pwron_write()
2783 MMIO_DH(BXT_PHY_CTL_FAMILY(DPIO_PHY1), D_BXT, in init_bxt_mmio_info()
2800 MMIO_DH(BXT_PORT_PCS_DW12_GRP(DPIO_PHY1, DPIO_CH0), D_BXT, in init_bxt_mmio_info()
2802 MMIO_DH(BXT_PORT_TX_DW3_LN(DPIO_PHY1, DPIO_CH0, 0), D_BXT, in init_bxt_mmio_info()
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Completed in 27 milliseconds