Home
last modified time | relevance | path

Searched refs:DPLLB_LVDS_P2_CLOCK_DIV_7 (Results 1 – 4 of 4) sorted by relevance

/drivers/gpu/drm/gma500/
A Dpsb_intel_display.c179 dpll |= DPLLB_LVDS_P2_CLOCK_DIV_7; in psb_intel_crtc_mode_set()
A Dpsb_intel_reg.h239 #define DPLLB_LVDS_P2_CLOCK_DIV_7 (1 << 24) /* i915 */ macro
/drivers/gpu/drm/i915/display/
A Dintel_dpll.c462 clock.p2 = dpll & DPLLB_LVDS_P2_CLOCK_DIV_7 ? in i9xx_crtc_clock_get()
1046 dpll |= DPLLB_LVDS_P2_CLOCK_DIV_7; in i9xx_dpll()
1318 dpll |= DPLLB_LVDS_P2_CLOCK_DIV_7; in ilk_dpll()
A Dintel_display_regs.h150 #define DPLLB_LVDS_P2_CLOCK_DIV_7 (1 << 24) /* i915 */ macro

Completed in 31 milliseconds