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Searched refs:DPLL_FPA01_P1_POST_DIV_MASK_I830 (Results 1 – 5 of 5) sorted by relevance

/drivers/gpu/drm/gma500/
A Dpsb_intel_display.c359 DPLL_FPA01_P1_POST_DIV_MASK_I830) >> in psb_intel_crtc_clock_get()
A Dpsb_intel_reg.h248 # define DPLL_FPA01_P1_POST_DIV_MASK_I830 0x001f0000 macro
A Dcdv_intel_display.c894 DPLL_FPA01_P1_POST_DIV_MASK_I830) >> in cdv_intel_crtc_clock_get()
/drivers/gpu/drm/i915/display/
A Dintel_dpll.c495 clock.p1 = ((dpll & DPLL_FPA01_P1_POST_DIV_MASK_I830) >> in i9xx_crtc_clock_get()
A Dintel_display_regs.h161 #define DPLL_FPA01_P1_POST_DIV_MASK_I830 0x001f0000 macro

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