Home
last modified time | relevance | path

Searched refs:DPLL_MD_UDI_DIVIDER_SHIFT (Results 1 – 3 of 3) sorted by relevance

/drivers/gpu/drm/gma500/
A Dpsb_intel_reg.h296 #define DPLL_MD_UDI_DIVIDER_SHIFT 24 macro
A Dcdv_intel_display.c780 …REG_WRITE(map->dpll_md, (0 << DPLL_MD_UDI_DIVIDER_SHIFT) | ((sdvo_pixel_multiply - 1) << DPLL_MD_U… in cdv_intel_crtc_mode_set()
/drivers/gpu/drm/i915/display/
A Dintel_display_regs.h232 #define DPLL_MD_UDI_DIVIDER_SHIFT 24 macro

Completed in 24 milliseconds