Searched refs:DPU_CLK_CTRL_DMA2 (Results 1 – 18 of 18) sorted by relevance
| /drivers/gpu/drm/msm/disp/dpu1/catalog/ |
| A D | dpu_4_1_sdm670.h | 19 [DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2bc, .bit_off = 8 },
63 .clk_ctrl = DPU_CLK_CTRL_DMA2,
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| A D | dpu_6_2_sc7180.h | 26 [DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2c4, .bit_off = 8 },
79 .clk_ctrl = DPU_CLK_CTRL_DMA2,
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| A D | dpu_3_3_sdm630.h | 29 [DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2c4, .bit_off = 8 },
92 .clk_ctrl = DPU_CLK_CTRL_DMA2,
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| A D | dpu_6_4_sm6350.h | 28 [DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2c4, .bit_off = 8 },
86 .clk_ctrl = DPU_CLK_CTRL_DMA2,
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| A D | dpu_5_3_sm6150.h | 27 [DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2bc, .bit_off = 8 },
93 .clk_ctrl = DPU_CLK_CTRL_DMA2,
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| A D | dpu_7_2_sc7280.h | 26 [DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2c4, .bit_off = 8 },
83 .clk_ctrl = DPU_CLK_CTRL_DMA2,
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| A D | dpu_3_2_sdm660.h | 30 [DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2c4, .bit_off = 8 },
101 .clk_ctrl = DPU_CLK_CTRL_DMA2,
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| A D | dpu_3_0_msm8998.h | 33 [DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2c4, .bit_off = 8 },
122 .clk_ctrl = DPU_CLK_CTRL_DMA2,
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| A D | dpu_5_2_sm7150.h | 31 [DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2bc, .bit_off = 8 },
104 .clk_ctrl = DPU_CLK_CTRL_DMA2,
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| A D | dpu_4_0_sdm845.h | 33 [DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2bc, .bit_off = 8 },
120 .clk_ctrl = DPU_CLK_CTRL_DMA2,
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| A D | dpu_5_0_sm8150.h | 33 [DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2bc, .bit_off = 8 },
123 .clk_ctrl = DPU_CLK_CTRL_DMA2,
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| A D | dpu_6_0_sm8250.h | 31 [DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2bc, .bit_off = 8 },
122 .clk_ctrl = DPU_CLK_CTRL_DMA2,
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| A D | dpu_7_0_sm8350.h | 31 [DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2bc, .bit_off = 8 },
122 .clk_ctrl = DPU_CLK_CTRL_DMA2,
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| A D | dpu_8_0_sc8280xp.h | 31 [DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2bc, .bit_off = 8 },
121 .clk_ctrl = DPU_CLK_CTRL_DMA2,
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| A D | dpu_8_1_sm8450.h | 31 [DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2bc, .bit_off = 8 },
122 .clk_ctrl = DPU_CLK_CTRL_DMA2,
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| A D | dpu_5_1_sc8180x.h | 33 [DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2bc, .bit_off = 8 },
123 .clk_ctrl = DPU_CLK_CTRL_DMA2,
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| A D | dpu_8_4_sa8775p.h | 30 [DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2bc, .bit_off = 8 },
121 .clk_ctrl = DPU_CLK_CTRL_DMA2,
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| /drivers/gpu/drm/msm/disp/dpu1/ |
| A D | dpu_hw_catalog.h | 353 DPU_CLK_CTRL_DMA2, enumerator
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