Searched refs:DPU_CLK_CTRL_DMA3 (Results 1 – 11 of 11) sorted by relevance
| /drivers/gpu/drm/msm/disp/dpu1/catalog/ |
| A D | dpu_5_3_sm6150.h | 28 [DPU_CLK_CTRL_DMA3] = { .reg_off = 0x2c4, .bit_off = 8 },
101 .clk_ctrl = DPU_CLK_CTRL_DMA3,
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| A D | dpu_3_0_msm8998.h | 34 [DPU_CLK_CTRL_DMA3] = { .reg_off = 0x2c4, .bit_off = 12 },
130 .clk_ctrl = DPU_CLK_CTRL_DMA3,
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| A D | dpu_4_0_sdm845.h | 34 [DPU_CLK_CTRL_DMA3] = { .reg_off = 0x2c4, .bit_off = 8 },
128 .clk_ctrl = DPU_CLK_CTRL_DMA3,
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| A D | dpu_5_0_sm8150.h | 34 [DPU_CLK_CTRL_DMA3] = { .reg_off = 0x2c4, .bit_off = 8 },
131 .clk_ctrl = DPU_CLK_CTRL_DMA3,
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| A D | dpu_6_0_sm8250.h | 32 [DPU_CLK_CTRL_DMA3] = { .reg_off = 0x2c4, .bit_off = 8 },
130 .clk_ctrl = DPU_CLK_CTRL_DMA3,
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| A D | dpu_7_0_sm8350.h | 32 [DPU_CLK_CTRL_DMA3] = { .reg_off = 0x2c4, .bit_off = 8 },
130 .clk_ctrl = DPU_CLK_CTRL_DMA3,
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| A D | dpu_8_0_sc8280xp.h | 32 [DPU_CLK_CTRL_DMA3] = { .reg_off = 0x2c4, .bit_off = 8 },
129 .clk_ctrl = DPU_CLK_CTRL_DMA3,
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| A D | dpu_8_1_sm8450.h | 32 [DPU_CLK_CTRL_DMA3] = { .reg_off = 0x2c4, .bit_off = 8 },
130 .clk_ctrl = DPU_CLK_CTRL_DMA3,
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| A D | dpu_5_1_sc8180x.h | 34 [DPU_CLK_CTRL_DMA3] = { .reg_off = 0x2c4, .bit_off = 8 },
131 .clk_ctrl = DPU_CLK_CTRL_DMA3,
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| A D | dpu_8_4_sa8775p.h | 31 [DPU_CLK_CTRL_DMA3] = { .reg_off = 0x2c4, .bit_off = 8 },
129 .clk_ctrl = DPU_CLK_CTRL_DMA3,
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| /drivers/gpu/drm/msm/disp/dpu1/ |
| A D | dpu_hw_catalog.h | 354 DPU_CLK_CTRL_DMA3, enumerator
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