Home
last modified time | relevance | path

Searched refs:DPU_DEBUG_CMDENC (Results 1 – 1 of 1) sorted by relevance

/drivers/gpu/drm/msm/disp/dpu1/
A Ddpu_encoder_phys_cmd.c19 #define DPU_DEBUG_CMDENC(e, fmt, ...) DPU_DEBUG("enc%d intf%d " fmt, \ macro
354 DPU_DEBUG_CMDENC(cmd_enc, "tearcheck not supported\n"); in dpu_encoder_phys_cmd_tearcheck_config()
358 DPU_DEBUG_CMDENC(cmd_enc, "intf %d pp %d\n", in dpu_encoder_phys_cmd_tearcheck_config()
377 DPU_DEBUG_CMDENC(cmd_enc, "invalid - no vsync clock\n"); in dpu_encoder_phys_cmd_tearcheck_config()
396 DPU_DEBUG_CMDENC(cmd_enc, in dpu_encoder_phys_cmd_tearcheck_config()
399 DPU_DEBUG_CMDENC(cmd_enc, in dpu_encoder_phys_cmd_tearcheck_config()
402 DPU_DEBUG_CMDENC(cmd_enc, in dpu_encoder_phys_cmd_tearcheck_config()
406 DPU_DEBUG_CMDENC(cmd_enc, in dpu_encoder_phys_cmd_tearcheck_config()
428 DPU_DEBUG_CMDENC(cmd_enc, "pp %d, enabling mode:\n", in _dpu_encoder_phys_cmd_pingpong_config()
605 DPU_DEBUG_CMDENC(cmd_enc, "pp:%d pending_cnt %d\n", in dpu_encoder_phys_cmd_prepare_for_kickoff()
[all …]

Completed in 6 milliseconds