Searched refs:DP_MSE_RATE_CNTL (Results 1 – 10 of 10) sorted by relevance
| /drivers/gpu/drm/amd/display/dc/dce/ |
| A D | dce_stream_encoder.h | 84 SRI(DP_MSE_RATE_CNTL, DP, id), \
148 SE_SF(DP_MSE_RATE_CNTL, DP_MSE_RATE_X, mask_sh),\
149 SE_SF(DP_MSE_RATE_CNTL, DP_MSE_RATE_Y, mask_sh),\
656 uint32_t DP_MSE_RATE_CNTL; member
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| A D | dce_stream_encoder.c | 711 REG_SET_2(DP_MSE_RATE_CNTL, 0, in dce110_stream_encoder_set_throttled_vcp_size()
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| /drivers/gpu/drm/amd/display/dc/dio/dcn10/ |
| A D | dcn10_stream_encoder.h | 82 SRI(DP_MSE_RATE_CNTL, DP, id), \
131 uint32_t DP_MSE_RATE_CNTL; member
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| A D | dcn10_stream_encoder.c | 645 REG_SET_2(DP_MSE_RATE_CNTL, 0, in enc1_stream_encoder_set_throttled_vcp_size()
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| /drivers/gpu/drm/amd/display/dc/resource/dcn35/ |
| A D | dcn35_resource.h | 116 SRI_ARR(DP_MSE_RATE_CNTL, DP, id), \
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| /drivers/gpu/drm/amd/display/dc/dio/dcn314/ |
| A D | dcn314_dio_stream_encoder.h | 85 SRI(DP_MSE_RATE_CNTL, DP, id), \
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| /drivers/gpu/drm/amd/display/dc/dio/dcn35/ |
| A D | dcn35_dio_stream_encoder.h | 83 SRI(DP_MSE_RATE_CNTL, DP, id), \
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| /drivers/gpu/drm/amd/display/dc/dio/dcn30/ |
| A D | dcn30_dio_stream_encoder.h | 84 SRI(DP_MSE_RATE_CNTL, DP, id), \
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| /drivers/gpu/drm/amd/display/dc/resource/dcn401/ |
| A D | dcn401_resource.h | 204 SRI_ARR(DP_MSE_RATE_CNTL, DP, id), SRI_ARR(DP_MSE_RATE_UPDATE, DP, id), \
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| /drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
| A D | dcn32_resource.h | 293 SRI_ARR(DP_MSE_RATE_CNTL, DP, id), SRI_ARR(DP_MSE_RATE_UPDATE, DP, id), \
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