| /drivers/gpu/drm/amd/display/dc/dio/dcn10/ |
| A D | dcn10_stream_encoder.c | 778 REG_UPDATE(DP_SEC_CNTL, DP_SEC_STREAM_ENABLE, 1); in enc1_stream_encoder_update_dp_info_packets()
872 REG_UPDATE(DP_SEC_CNTL, DP_SEC_STREAM_ENABLE, 1); in enc1_stream_encoder_send_immediate_sdp_message()
892 DP_SEC_STREAM_ENABLE, 0); in enc1_stream_encoder_stop_dp_info_packets()
899 REG_UPDATE(DP_SEC_CNTL, DP_SEC_STREAM_ENABLE, 1); in enc1_stream_encoder_stop_dp_info_packets()
1401 REG_UPDATE(DP_SEC_CNTL, DP_SEC_STREAM_ENABLE, 1); in enc1_se_enable_dp_audio()
1416 DP_SEC_STREAM_ENABLE, 0); in enc1_se_disable_dp_audio()
1423 REG_UPDATE(DP_SEC_CNTL, DP_SEC_STREAM_ENABLE, 1); in enc1_se_disable_dp_audio()
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| A D | dcn10_stream_encoder.h | 225 SE_SF(DP0_DP_SEC_CNTL, DP_SEC_STREAM_ENABLE, mask_sh),\
433 type DP_SEC_STREAM_ENABLE;\
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| /drivers/gpu/drm/amd/display/dc/dce/ |
| A D | dce_stream_encoder.c | 870 REG_UPDATE(DP_SEC_CNTL, DP_SEC_STREAM_ENABLE, 1); in dce110_stream_encoder_update_dp_info_packets()
888 DP_SEC_STREAM_ENABLE, 0); in dce110_stream_encoder_stop_dp_info_packets()
896 REG_UPDATE(DP_SEC_CNTL, DP_SEC_STREAM_ENABLE, 1); in dce110_stream_encoder_stop_dp_info_packets()
1411 REG_UPDATE(DP_SEC_CNTL, DP_SEC_STREAM_ENABLE, 1); in dce110_se_enable_dp_audio()
1426 DP_SEC_STREAM_ENABLE, 0); in dce110_se_disable_dp_audio()
1432 REG_UPDATE(DP_SEC_CNTL, DP_SEC_STREAM_ENABLE, 1); in dce110_se_disable_dp_audio()
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| A D | dce_stream_encoder.h | 156 SE_SF(DP_SEC_CNTL, DP_SEC_STREAM_ENABLE, mask_sh),\
237 SE_SF(DP0_DP_SEC_CNTL, DP_SEC_STREAM_ENABLE, mask_sh),\
426 uint8_t DP_SEC_STREAM_ENABLE; member
558 uint32_t DP_SEC_STREAM_ENABLE; member
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| /drivers/gpu/drm/amd/display/dc/dio/dcn30/ |
| A D | dcn30_dio_stream_encoder.c | 375 DP_SEC_STREAM_ENABLE, 1); in enc3_dp_set_dsc_pps_info_packet()
401 REG_GET(DP_SEC_CNTL, DP_SEC_STREAM_ENABLE, &s->sec_stream_enable); in enc3_read_state()
508 REG_UPDATE(DP_SEC_CNTL, DP_SEC_STREAM_ENABLE, 1); in enc3_stream_encoder_update_dp_info_packets()
515 REG_UPDATE(DP_SEC_CNTL, DP_SEC_STREAM_ENABLE, 1); in enc3_stream_encoder_update_dp_info_packets()
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| A D | dcn30_dio_stream_encoder.h | 135 SE_SF(DP0_DP_SEC_CNTL, DP_SEC_STREAM_ENABLE, mask_sh),\
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| /drivers/gpu/drm/amd/display/dc/dio/dcn20/ |
| A D | dcn20_stream_encoder.c | 339 DP_SEC_STREAM_ENABLE, 1); in enc2_dp_set_dsc_pps_info_packet()
365 REG_GET(DP_SEC_CNTL, DP_SEC_STREAM_ENABLE, &s->sec_stream_enable); in enc2_read_state()
456 REG_UPDATE(DP_SEC_CNTL, DP_SEC_STREAM_ENABLE, 1); in enc2_stream_encoder_update_dp_info_packets()
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| /drivers/gpu/drm/amd/display/dc/dio/dcn314/ |
| A D | dcn314_dio_stream_encoder.c | 418 REG_GET(DP_SEC_CNTL, DP_SEC_STREAM_ENABLE, &s->sec_stream_enable); in enc314_read_state()
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| A D | dcn314_dio_stream_encoder.h | 134 SE_SF(DP0_DP_SEC_CNTL, DP_SEC_STREAM_ENABLE, mask_sh),\
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| /drivers/gpu/drm/amd/display/dc/dio/dcn32/ |
| A D | dcn32_dio_stream_encoder.c | 380 REG_GET(DP_SEC_CNTL, DP_SEC_STREAM_ENABLE, &s->sec_stream_enable); in enc32_read_state()
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| A D | dcn32_dio_stream_encoder.h | 55 SE_SF(DP0_DP_SEC_CNTL, DP_SEC_STREAM_ENABLE, mask_sh),\
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| /drivers/gpu/drm/amd/display/dc/dio/dcn401/ |
| A D | dcn401_dio_stream_encoder.h | 56 SE_SF(DP0_DP_SEC_CNTL, DP_SEC_STREAM_ENABLE, mask_sh),\
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| A D | dcn401_dio_stream_encoder.c | 393 REG_GET(DP_SEC_CNTL, DP_SEC_STREAM_ENABLE, &s->sec_stream_enable); in enc401_read_state()
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| /drivers/gpu/drm/amd/display/dc/dio/dcn35/ |
| A D | dcn35_dio_stream_encoder.h | 135 SE_SF(DP0_DP_SEC_CNTL, DP_SEC_STREAM_ENABLE, mask_sh),\
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| /drivers/gpu/drm/amd/amdgpu/ |
| A D | dce_v6_0.c | 1713 tmp = REG_SET_FIELD(tmp, DP_SEC_CNTL, DP_SEC_STREAM_ENABLE, 1); in dce_v6_0_audio_dp_enable()
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