| /drivers/gpu/drm/amd/display/dc/dce/ |
| A D | dce_stream_encoder.h | 89 SRI(DP_VID_M, DP, id), \
168 SE_SF(DP_VID_M, DP_VID_M, mask_sh),\
248 SE_SF(DP0_DP_VID_M, DP_VID_M, mask_sh),\
442 uint8_t DP_VID_M; member
574 uint32_t DP_VID_M; member
661 uint32_t DP_VID_M; member
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| A D | dce_stream_encoder.c | 983 REG_UPDATE(DP_VID_M, DP_VID_M, m_vid); in dce110_stream_encoder_dp_unblank()
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| /drivers/gpu/drm/amd/display/dc/dio/dcn314/ |
| A D | dcn314_dio_stream_encoder.c | 338 REG_UPDATE(DP_VID_M, DP_VID_M, m_vid); in enc314_stream_encoder_dp_unblank()
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| A D | dcn314_dio_stream_encoder.h | 94 SRI(DP_VID_M, DP, id), \
151 SE_SF(DP0_DP_VID_M, DP_VID_M, mask_sh),\
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| /drivers/gpu/drm/amd/display/dc/dio/dcn35/ |
| A D | dcn35_dio_stream_encoder.c | 318 REG_UPDATE(DP_VID_M, DP_VID_M, m_vid); in enc35_stream_encoder_dp_unblank()
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| A D | dcn35_dio_stream_encoder.h | 92 SRI(DP_VID_M, DP, id), \
152 SE_SF(DP0_DP_VID_M, DP_VID_M, mask_sh),\
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| /drivers/gpu/drm/amd/display/dc/dio/dcn32/ |
| A D | dcn32_dio_stream_encoder.c | 286 REG_UPDATE(DP_VID_M, DP_VID_M, m_vid); in enc32_stream_encoder_dp_unblank()
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| A D | dcn32_dio_stream_encoder.h | 72 SE_SF(DP0_DP_VID_M, DP_VID_M, mask_sh),\
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| /drivers/gpu/drm/amd/display/dc/dio/dcn10/ |
| A D | dcn10_stream_encoder.h | 91 SRI(DP_VID_M, DP, id), \
140 uint32_t DP_VID_M; member
240 SE_SF(DP0_DP_VID_M, DP_VID_M, mask_sh),\
456 type DP_VID_M;\
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| A D | dcn10_stream_encoder.c | 997 REG_UPDATE(DP_VID_M, DP_VID_M, m_vid); in enc1_stream_encoder_dp_unblank()
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| /drivers/gpu/drm/amd/display/dc/dio/dcn20/ |
| A D | dcn20_stream_encoder.c | 507 REG_UPDATE(DP_VID_M, DP_VID_M, m_vid); in enc2_stream_encoder_dp_unblank()
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| /drivers/gpu/drm/amd/display/dc/dio/dcn30/ |
| A D | dcn30_dio_stream_encoder.h | 93 SRI(DP_VID_M, DP, id), \
150 SE_SF(DP0_DP_VID_M, DP_VID_M, mask_sh),\
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| /drivers/gpu/drm/amd/display/dc/dio/dcn401/ |
| A D | dcn401_dio_stream_encoder.c | 301 REG_UPDATE(DP_VID_M, DP_VID_M, m_vid); in enc401_stream_encoder_dp_unblank()
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| A D | dcn401_dio_stream_encoder.h | 74 SE_SF(DP0_DP_VID_M, DP_VID_M, mask_sh),\
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| /drivers/gpu/drm/amd/display/dc/resource/dcn35/ |
| A D | dcn35_resource.h | 125 SRI_ARR(DP_VID_M, DP, id), \
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| /drivers/gpu/drm/amd/display/dc/resource/dcn401/ |
| A D | dcn401_resource.h | 208 SRI_ARR(DP_STEER_FIFO, DP, id), SRI_ARR(DP_VID_M, DP, id), \
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| /drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
| A D | dcn32_resource.h | 297 SRI_ARR(DP_STEER_FIFO, DP, id), SRI_ARR(DP_VID_M, DP, id), \
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