Searched refs:DSPSURF (Results 1 – 8 of 8) sorted by relevance
| /drivers/gpu/drm/i915/display/ |
| A D | i9xx_plane.c | 514 intel_de_write_fw(display, DSPSURF(display, i9xx_plane), in i9xx_plane_update_arm()
559 intel_de_write_fw(display, DSPSURF(display, i9xx_plane), 0); in i9xx_plane_disable_arm()
572 error->surf = intel_de_read(display, DSPSURF(display, i9xx_plane)); in g4x_primary_capture_error()
584 error->surf = intel_de_read(display, DSPSURF(display, i9xx_plane)); in i965_plane_capture_error()
615 intel_de_write_fw(display, DSPSURF(display, i9xx_plane), in g4x_primary_async_flip()
921 reg = intel_de_read_fw(display, DSPSURF(display, i9xx_plane)); in i9xx_disable_tiling()
922 intel_de_write_fw(display, DSPSURF(display, i9xx_plane), reg); in i9xx_disable_tiling()
1211 base = intel_de_read(display, DSPSURF(display, i9xx_plane)) & DISP_ADDR_MASK; in i9xx_get_initial_plane_config()
1219 base = intel_de_read(display, DSPSURF(display, i9xx_plane)) & DISP_ADDR_MASK; in i9xx_get_initial_plane_config()
1272 intel_de_write(display, DSPSURF(display, i9xx_plane), base); in i9xx_fixup_initial_plane_config()
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| A D | i9xx_plane_regs.h | 72 #define DSPSURF(dev_priv, plane) _MMIO_PIPE2(dev_priv, plane, _DSPASURF) macro
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| A D | intel_fbc.c | 414 intel_de_write_fw(display, DSPSURF(display, i9xx_plane), in i965_fbc_nuke()
415 intel_de_read_fw(display, DSPSURF(display, i9xx_plane))); in i965_fbc_nuke()
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| /drivers/gpu/drm/i915/ |
| A D | intel_clock_gating.c | 141 intel_uncore_rmw(&dev_priv->uncore, DSPSURF(dev_priv, pipe), in g4x_disable_trickle_feed()
144 DSPSURF(dev_priv, pipe)); in g4x_disable_trickle_feed()
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| A D | intel_gvt_mmio_table.c | 180 MMIO_D(DSPSURF(dev_priv, PIPE_A)); in iterate_generic_mmio()
189 MMIO_D(DSPSURF(dev_priv, PIPE_B)); in iterate_generic_mmio()
198 MMIO_D(DSPSURF(dev_priv, PIPE_C)); in iterate_generic_mmio()
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| /drivers/gpu/drm/i915/gvt/ |
| A D | fb_decoder.c | 258 plane->base = vgpu_vreg_t(vgpu, DSPSURF(display, pipe)) & I915_GTT_PAGE_MASK; in intel_vgpu_decode_primary_plane()
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| A D | handlers.c | 1022 calc_index(offset, DSPSURF(display, PIPE_A), DSPSURF(display, PIPE_B), DSPSURF(display, PIPE_C))
2302 MMIO_DH(DSPSURF(display, PIPE_A), D_ALL, NULL, pri_surf_mmio_write); in init_generic_mmio_info()
2305 MMIO_DH(DSPSURF(display, PIPE_B), D_ALL, NULL, pri_surf_mmio_write); in init_generic_mmio_info()
2308 MMIO_DH(DSPSURF(display, PIPE_C), D_ALL, NULL, pri_surf_mmio_write); in init_generic_mmio_info()
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| A D | cmd_parser.c | 1322 info->surf_reg = DSPSURF(display, info->pipe); in gen8_decode_mi_display_flip()
1389 info->surf_reg = DSPSURF(display, info->pipe); in skl_decode_mi_display_flip()
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Completed in 824 milliseconds