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Searched refs:DSS_CONTROL (Results 1 – 2 of 2) sorted by relevance

/drivers/video/fbdev/omap2/omapfb/dss/
A Ddss.c51 #define DSS_CONTROL DSS_REG(0x0040) macro
383 DUMPREG(DSS_CONTROL); in dss_dump_regs()
446 REG_FLD_MOD(DSS_CONTROL, b, pos, pos); /* DSIx_CLK_SWITCH */ in dss_select_dsi_clk_source()
481 REG_FLD_MOD(DSS_CONTROL, b, pos, pos); /* LCDx_CLK_SWITCH */ in dss_select_lcd_clk_source()
617 REG_FLD_MOD(DSS_CONTROL, l, 6, 6); in dss_set_venc_output()
650 return REG_GET(DSS_CONTROL, 15, 15); in dss_get_hdmi_venc_clk_source()
676 REG_FLD_MOD(DSS_CONTROL, val, 17, 17); in dss_dpi_select_source_omap4()
702 REG_FLD_MOD(DSS_CONTROL, val, 17, 16); in dss_dpi_select_source_omap5()
1117 REG_FLD_MOD(DSS_CONTROL, 0, 0, 0); in dss_bind()
1122 REG_FLD_MOD(DSS_CONTROL, 1, 4, 4); /* venc dac demen */ in dss_bind()
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/drivers/gpu/drm/omapdrm/dss/
A Ddss.c50 #define DSS_CONTROL DSS_REG(0x0040) macro
368 DUMPREG(dss, DSS_CONTROL); in dss_dump_regs()
490 REG_FLD_MOD(dss, DSS_CONTROL, 1, ctrl_bit, ctrl_bit); in dss_lcd_clk_mux_dra7()
521 REG_FLD_MOD(dss, DSS_CONTROL, 1, ctrl_bit, ctrl_bit); in dss_lcd_clk_mux_omap5()
550 REG_FLD_MOD(dss, DSS_CONTROL, 1, ctrl_bit, ctrl_bit); in dss_lcd_clk_mux_omap4()
710 REG_FLD_MOD(dss, DSS_CONTROL, l, 6, 6); in dss_set_venc_output()
716 REG_FLD_MOD(dss, DSS_CONTROL, enable, 5, 5); in dss_set_dac_pwrdn_bgz()
734 REG_FLD_MOD(dss, DSS_CONTROL, src, 15, 15); in dss_select_hdmi_venc_clk_source()
762 REG_FLD_MOD(dss, DSS_CONTROL, val, 17, 17); in dss_dpi_select_source_omap4()
789 REG_FLD_MOD(dss, DSS_CONTROL, val, 17, 16); in dss_dpi_select_source_omap5()
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