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Searched refs:DVSCNTR (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/i915/display/
A Dintel_sprite.c1209 intel_de_write_fw(display, DVSCNTR(pipe), dvscntr); in g4x_sprite_update_arm()
1227 intel_de_write_fw(display, DVSCNTR(pipe), 0); in g4x_sprite_disable_arm()
1239 error->ctl = intel_de_read(display, DVSCNTR(crtc->pipe)); in g4x_sprite_capture_error()
1258 ret = intel_de_read(display, DVSCNTR(plane->pipe)) & DVS_ENABLE; in g4x_sprite_get_hw_state()
A Dintel_sprite_regs.h12 #define DVSCNTR(pipe) _MMIO_PIPE(pipe, _DVSACNTR, _DVSBCNTR) macro

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