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Searched refs:E (Results 1 – 25 of 106) sorted by relevance

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/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/nvrm/
A Dmsgfn.h11 #ifndef E
12 # define E(RPC, VAL) NV_VGPU_MSG_EVENT_##RPC = VAL, macro
16 E(FIRST_EVENT, 0x1000) enumerator
17 E(GSP_INIT_DONE, 0x1001)
18 E(GSP_RUN_CPU_SEQUENCER, 0x1002)
19 E(POST_EVENT, 0x1003)
20 E(RC_TRIGGERED, 0x1004)
21 E(MMU_FAULT_QUEUED, 0x1005)
22 E(OS_ERROR_LOG, 0x1006)
23 E(RG_LINE_INTR, 0x1007)
[all …]
/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/
A Dmsgfn.h11 #ifndef E
12 # define E(RPC) NV_VGPU_MSG_EVENT_##RPC, macro
16 E(FIRST_EVENT = 0x1000) // 0x1000 enumerator
17 E(GSP_INIT_DONE) // 0x1001
18 E(GSP_RUN_CPU_SEQUENCER) // 0x1002
19 E(POST_EVENT) // 0x1003
20 E(RC_TRIGGERED) // 0x1004
21 E(MMU_FAULT_QUEUED) // 0x1005
22 E(OS_ERROR_LOG) // 0x1006
47 E(NUM_EVENTS) // END
[all …]
/drivers/gpu/nova-core/falcon/hal/
A Dga102.rs23 .write(bar, E::BASE); in select_core_ga102()
79 .write(bar, E::BASE); in program_brom_ga102()
82 .write(bar, E::BASE); in program_brom_ga102()
85 .write(bar, E::BASE); in program_brom_ga102()
88 .write(bar, E::BASE); in program_brom_ga102()
93 pub(super) struct Ga102<E: FalconEngine>(PhantomData<E>);
95 impl<E: FalconEngine> Ga102<E> {
101 impl<E: FalconEngine> FalconHal<E> for Ga102<E> {
103 select_core_ga102::<E>(bar) in select_core()
108 falcon: &Falcon<E>, in signature_reg_fuse_version() argument
[all …]
/drivers/gpu/nova-core/
A Dfalcon.rs331 hal: KBox<dyn FalconHal<E>>,
335 impl<E: FalconEngine + 'static> Falcon<E> {
416 .write(bar, E::BASE); in reset()
467 .write(bar, E::BASE); in dma_wr()
470 .write(bar, E::BASE); in dma_wr()
481 .write(bar, E::BASE); in dma_wr()
484 .write(bar, E::BASE); in dma_wr()
485 cmd.write(bar, E::BASE); in dma_wr()
520 .write(bar, E::BASE); in dma_load()
541 .write(bar, E::BASE); in boot()
[all …]
/drivers/pinctrl/sunxi/
A Dpinctrl-sun8i-v3s.c302 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
307 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
312 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
317 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
322 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
327 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
332 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
337 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
342 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
347 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
[all …]
A Dpinctrl-sun8i-a83t.c305 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
310 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
315 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
320 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
325 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
329 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
333 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
338 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
343 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
348 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
[all …]
A Dpinctrl-sun8i-a33.c264 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
268 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
272 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
276 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
280 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
284 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
288 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
292 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
296 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
300 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
[all …]
A Dpinctrl-sun50i-a64.c322 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
327 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
332 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
337 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
342 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
347 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
352 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
357 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
362 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
367 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
[all …]
A Dpinctrl-sun8i-a23.c342 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
346 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
350 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
354 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
358 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
362 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
366 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
370 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
374 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
378 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
[all …]
A Dpinctrl-sun50i-h616.c384 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
389 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
394 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
399 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
404 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
409 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
414 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
419 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
424 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
429 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
[all …]
A Dpinctrl-suniv-f1c100s.c253 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
261 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
269 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
276 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
284 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
292 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
299 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
307 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
314 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
321 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
[all …]
A Dpinctrl-sun8i-h3.c306 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
311 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
316 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
321 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
326 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
331 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
336 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
341 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
346 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
351 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
[all …]
A Dpinctrl-sun50i-h5.c335 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
340 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
345 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
350 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
355 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
360 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
365 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
370 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
376 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
382 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
[all …]
A Dpinctrl-sun9i-a80.c394 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
400 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
406 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
412 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
418 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
425 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
432 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
439 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
446 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
452 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
[all …]
A Dpinctrl-sun20i-d1.c400 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
409 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
418 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
428 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
438 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
449 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
460 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
471 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
482 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
492 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
[all …]
A Dpinctrl-sun6i-a31.c592 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
598 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
604 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
610 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
616 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
622 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
628 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
634 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
640 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
646 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
[all …]
A Dpinctrl-sun5i.c525 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
531 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
537 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
542 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
548 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
554 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
560 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
566 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
572 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
578 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
[all …]
A Dpinctrl-sun50i-a100.c366 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
371 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
376 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
381 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
386 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
391 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
399 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
405 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
413 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
419 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
/drivers/gpu/nova-core/falcon/
A Dhal.rs16 pub(crate) trait FalconHal<E: FalconEngine>: Sync {
18 fn select_core(&self, _falcon: &Falcon<E>, _bar: &Bar0) -> Result { in select_core() argument
26 falcon: &Falcon<E>, in signature_reg_fuse_version() argument
33 fn program_brom(&self, falcon: &Falcon<E>, bar: &Bar0, params: &FalconBromParams) -> Result; in program_brom() argument
41 pub(super) fn falcon_hal<E: FalconEngine + 'static>( in falcon_hal()
43 ) -> Result<KBox<dyn FalconHal<E>>> { in falcon_hal() argument
48 KBox::new(ga102::Ga102::<E>::new(), GFP_KERNEL)? as KBox<dyn FalconHal<E>> in falcon_hal()
/drivers/mtd/devices/
A Dslram.c53 #define E(fmt, args...) printk(KERN_NOTICE fmt, ## args) macro
140 E("slram: Cannot allocate new MTD device.\n"); in register_device()
157 E("slram: Cannot allocate new MTD device.\n"); in register_device()
164 E("slram: memremap failed\n"); in register_device()
185 E("slram: Failed to register new device\n"); in register_device()
261 E("slram: Illegal length parameter.\n"); in parse_cmdline()
286 E("slram: not enough parameters.\n"); in init_slram()
293 E("slram: No devicename specified.\n"); in init_slram()
298 E("slram: No devicestart specified.\n"); in init_slram()
303 E("slram: No devicelength / -end specified.\n"); in init_slram()
[all …]
/drivers/tty/vt/
A Ducs_recompose_table.h_shipped29 … 0x0045, 0x0300, 0x00C8 }, /* LATIN CAPITAL LETTER E + COMBINING GRAVE ACCENT = LATIN CAPITAL LETT…
30 … 0x0045, 0x0301, 0x00C9 }, /* LATIN CAPITAL LETTER E + COMBINING ACUTE ACCENT = LATIN CAPITAL LETT…
31 …0045, 0x0302, 0x00CA }, /* LATIN CAPITAL LETTER E + COMBINING CIRCUMFLEX ACCENT = LATIN CAPITAL LE…
32 …{ 0x0045, 0x0308, 0x00CB }, /* LATIN CAPITAL LETTER E + COMBINING DIAERESIS = LATIN CAPITAL LETTER…
55 …{ 0x0065, 0x0300, 0x00E8 }, /* LATIN SMALL LETTER E + COMBINING GRAVE ACCENT = LATIN SMALL LETTER …
56 …{ 0x0065, 0x0301, 0x00E9 }, /* LATIN SMALL LETTER E + COMBINING ACUTE ACCENT = LATIN SMALL LETTER …
57 … 0x0065, 0x0302, 0x00EA }, /* LATIN SMALL LETTER E + COMBINING CIRCUMFLEX ACCENT = LATIN SMALL LET…
58 …{ 0x0065, 0x0308, 0x00EB }, /* LATIN SMALL LETTER E + COMBINING DIAERESIS = LATIN SMALL LETTER E W…
A Ducs_fallback_table.h_shipped100 { 0xCB, 0x45 }, /* LATIN CAPITAL LETTER E WITH DIAERESIS -> 'E' */
150 { 0x12, 0x45 }, /* LATIN CAPITAL LETTER E WITH MACRON -> 'E' */
152 { 0x14, 0x45 }, /* LATIN CAPITAL LETTER E WITH BREVE -> 'E' */
156 { 0x18, 0x45 }, /* LATIN CAPITAL LETTER E WITH OGONEK -> 'E' */
158 { 0x1A, 0x45 }, /* LATIN CAPITAL LETTER E WITH CARON -> 'E' */
270 { 0x90, 0x45 }, /* LATIN CAPITAL LETTER OPEN E -> 'E' */
672 { 0x2D, 0x45 }, /* CYRILLIC CAPITAL LETTER E -> 'E' */
2095 { 0x07, 0x45 }, /* LATIN LETTER SMALL CAPITAL E -> 'E' */
2121 { 0x31, 0x45 }, /* MODIFIER LETTER CAPITAL E -> 'E' */
2671 { 0x30, 0x45 }, /* SCRIPT CAPITAL E -> 'E' */
[all …]
/drivers/scsi/megaraid/
A DKconfig.megaraid26 Dell PERC3/QC 101E:1960:1028:0471
27 Dell PERC3/DC 101E:1960:1028:0493
28 Dell PERC3/SC 101E:1960:1028:0475
29 Dell PERC3/Di 1028:000E:1028:0123
47 LSI MegaRAID SCSI 320-1E 1000:0408:1000:0001
48 LSI MegaRAID SCSI 320-2E 1000:0408:1000:0002
62 ACER MegaRAID ROMB-2E 1000:0408:1025:004D
/drivers/crypto/
A Dpadlock-aes.c61 u32 E[AES_MAX_KEYLENGTH_U32] member
123 ctx->D = ctx->E; in aes_set_key()
125 ctx->E[0] = le32_to_cpu(key[0]); in aes_set_key()
126 ctx->E[1] = le32_to_cpu(key[1]); in aes_set_key()
127 ctx->E[2] = le32_to_cpu(key[2]); in aes_set_key()
128 ctx->E[3] = le32_to_cpu(key[3]); in aes_set_key()
150 memcpy(ctx->E, gen_aes.key_enc, AES_MAX_KEYLENGTH); in aes_set_key()
311 ecb_crypt(in, out, ctx->E, &ctx->cword.encrypt, 1); in padlock_aes_encrypt()
358 ctx->E, &ctx->cword.encrypt, in ecb_aes_encrypt()
423 walk.dst.virt.addr, ctx->E, in cbc_aes_encrypt()
/drivers/gpu/drm/nouveau/nvkm/engine/gr/
A Dgm107.c350 int E = -1, X; in gm107_gr_init_bios() local
353 while (nvbios_P0260Ep(bios, ++E, &ver, &hdr, &infoE)) { in gm107_gr_init_bios()
354 if (X = -1, E < ARRAY_SIZE(regs)) { in gm107_gr_init_bios()
355 nvkm_wr32(device, regs[E].ctrl, infoE.data); in gm107_gr_init_bios()
357 nvkm_wr32(device, regs[E].data, infoX.data); in gm107_gr_init_bios()

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