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Searched refs:EU_PERF_CNTL5 (Results 1 – 6 of 6) sorted by relevance

/drivers/gpu/drm/xe/regs/
A Dxe_oa_regs.h15 #define EU_PERF_CNTL5 XE_REG(0xe55c) macro
/drivers/gpu/drm/i915/gt/uc/
A Dintel_guc_ads.c426 ret |= GUC_MCR_REG_ADD(gt, regset, MCR_REG(i915_mmio_reg_offset(EU_PERF_CNTL5)), false); in guc_mmio_regset_init()
/drivers/gpu/drm/i915/
A Di915_perf.c2459 EU_PERF_CNTL5, in gen8_update_reg_state_unlocked()
2777 { EU_PERF_CNTL5, ctx_flexeuN(5) }, in lrc_configure_all_contexts()
4311 EU_PERF_CNTL5, in gen8_is_valid_flex_addr()
/drivers/gpu/drm/i915/gt/
A Dintel_gt_regs.h1169 #define EU_PERF_CNTL5 PERF_REG(0xe55c) macro
/drivers/gpu/drm/i915/gvt/
A Dscheduler.c97 i915_mmio_reg_offset(EU_PERF_CNTL5), in sr_oa_regs()
/drivers/gpu/drm/xe/
A Dxe_oa.c2116 EU_PERF_CNTL5, in xe_oa_is_valid_flex_addr()

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