Searched refs:EXYNOS_MBOX_INTGR1 (Results 1 – 1 of 1) sorted by relevance
24 #define EXYNOS_MBOX_INTGR1 0x40 /* Interrupt Generation Register 1 */ macro62 writel(BIT(msg->chan_id), exynos_mbox->regs + EXYNOS_MBOX_INTGR1); in exynos_mbox_send_data()
Completed in 4 milliseconds