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Searched refs:F2 (Results 1 – 10 of 10) sorted by relevance

/drivers/pinctrl/renesas/
A Dpfc-r8a73a4.c232 #define F2(a) a##_MARK macro
304 F2(KEYOUT0), F2(KEYOUT1), F2(KEYOUT2), F2(KEYOUT3), enumerator
305 F2(KEYOUT4), F2(KEYOUT5), IRQ(43), F2(KEYOUT6), IRQ(44), /* Port110 */ enumerator
342 F1(A0), F2(BS), enumerator
343 F1(CKO), F2(MMCCLK1), enumerator
365 F1(WE0_N), F2(RDWR_227), enumerator
369 F1(SLIM_DATA), F2(VIO_CKO5_231), F2(VIO_CKO2_232), F4(SF_PORT_0_232), enumerator
374 F1(FSIAOLR), F2(FSIAILR), F1(FSIAOBT), F2(FSIAIBT), enumerator
378 F1(FSIBOBT), F2(FSIBIBT), F1(FSIBOSLD), F2(FSIASPDIF), enumerator
384 F2(SCIFB1_SCK_261), F7(CHSCIF1_HSCK), F2(SCIFB2_SCK_262), enumerator
[all …]
/drivers/gpu/drm/xe/
A Dxe_step_types.h46 func(F2) \
/drivers/gpu/drm/i915/
A Dintel_step.h47 func(F2) \
/drivers/s390/char/
A Ddefkeymap.map156 shift control keycode 114 = F2
166 string F2 = "\033[[B"
/drivers/tty/vt/
A Ddefkeymap.map128 keycode 60 = F2 F12 Console_14
129 control keycode 60 = F2
264 string F2 = "\033[[B"
/drivers/edac/
A Damd64_edac.c168 return amd64_read_pci_cfg(pvt->F2, offset, val); in amd64_read_dct_pci_cfg()
219 pci_write_bits32(pvt->F2, F15H_M60H_SCRCTRL, scrubval, 0x001F); in __set_scrub_rate()
221 pci_write_bits32(pvt->F2, F15H_M60H_SCRCTRL, scrubval, 0x001F); in __set_scrub_rate()
263 amd64_read_pci_cfg(pvt->F2, F15H_M60H_SCRCTRL, &scrubval); in get_scrub_rate()
2035 if (!amd64_read_pci_cfg(pvt->F2, DCT_SEL_LO, &pvt->dct_sel_lo)) { in read_dram_ctl_register()
2056 amd64_read_pci_cfg(pvt->F2, DCT_SEL_HI, &pvt->dct_sel_hi); in read_dram_ctl_register()
2273 amd64_read_pci_cfg(pvt->F2, SWAP_INTLV_REG, &swap_reg); in f1x_swap_interleaved_region()
2878 if (!pvt->F2) { in reserve_mc_sibling_devs()
2887 pci_ctl_dev = &pvt->F2->dev; in reserve_mc_sibling_devs()
2890 edac_dbg(1, "F2: %s\n", pci_name(pvt->F2)); in reserve_mc_sibling_devs()
[all …]
A Damd64_edac.h328 struct pci_dev *F1, *F2, *F3; member
/drivers/pinctrl/aspeed/
A Dpinctrl-aspeed-g5.c1363 #define F2 184 macro
1364 SIG_EXPR_LIST_DECL_SINGLE(F2, GPIOX0, GPIOX0, SIG_DESC_SET(SCUA4, 0));
1365 SIG_EXPR_LIST_DECL_SINGLE(F2, ADC8, ADC8);
1366 PIN_DECL_(F2, SIG_EXPR_LIST_PTR(F2, GPIOX0), SIG_EXPR_LIST_PTR(F2, ADC8));
1367 FUNC_GROUP_DECL(ADC8, F2);
2016 ASPEED_PINCTRL_PIN(F2),
2581 ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, F2, F2, SCUA8, 12),
2582 ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, F2, F2, SCUA8, 12),
/drivers/pinctrl/
A Dpinctrl-pic32.c1362 PIC32_PINCTRL_GROUP(82, F2,
/drivers/watchdog/
A DKconfig1274 It's possible to enable the watchdog timer either from BIOS (F2) or

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