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Searched refs:FN (Results 1 – 25 of 200) sorted by relevance

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/drivers/gpu/drm/amd/display/dc/inc/
A Dreg_helper.h69 FN(reg, f1), v1,\
70 FN(reg, f2), v2)
74 FN(reg, f1), v1,\
75 FN(reg, f2), v2,\
76 FN(reg, f3), v3)
83 FN(reg, f4), v4)
92 FN(reg, f5), v5)
102 FN(reg, f6), v6)
113 FN(reg, f7), v7)
125 FN(reg, f8), v8)
[all …]
/drivers/gpu/drm/amd/display/dmub/src/
A Ddmub_reg.h67 FN(reg, f1), v1, \
68 FN(reg, f2), v2)
72 FN(reg, f1), v1, \
73 FN(reg, f2), v2, \
74 FN(reg, f3), v3)
78 FN(reg, f1), v1, \
81 FN(reg, f4), v4)
94 FN(reg, f1), v1,\
95 FN(reg, f2), v2)
101 FN(reg, f3), v3)
[all …]
/drivers/gpu/drm/amd/display/dc/dce/
A Ddce_i2c_hw.c36 #undef FN
37 #define FN(reg_name, field_name) \ macro
44 FN(DC_I2C_DDC1_SETUP, DC_I2C_DDC1_DATA_DRIVE_EN), 0, in execute_transaction()
45 FN(DC_I2C_DDC1_SETUP, DC_I2C_DDC1_CLK_DRIVE_EN), 0, in execute_transaction()
46 FN(DC_I2C_DDC1_SETUP, DC_I2C_DDC1_DATA_DRIVE_SEL), 0, in execute_transaction()
48 FN(DC_I2C_DDC1_SETUP, DC_I2C_DDC1_INTRA_BYTE_DELAY), 0); in execute_transaction()
287 FN(DC_I2C_DDC1_SPEED, DC_I2C_DDC1_THRESHOLD), 2, in set_speed()
292 FN(DC_I2C_DDC1_SPEED, DC_I2C_DDC1_THRESHOLD), 2); in set_speed()
336 FN(DC_I2C_DDC1_SETUP, DC_I2C_DDC1_CLK_EN), 1); in setup_engine()
360 FN(DC_I2C_DDC1_SETUP, DC_I2C_DDC1_ENABLE), 1); in setup_engine()
[all …]
/drivers/net/ethernet/qlogic/qlcnic/
A Dqlcnic_hdr.h641 #define QLC_DEV_SET_REF_CNT(VAL, FN) ((VAL) |= (1 << (FN * 4))) argument
642 #define QLC_DEV_CLR_REF_CNT(VAL, FN) ((VAL) &= ~(1 << (FN * 4))) argument
643 #define QLC_DEV_SET_RST_RDY(VAL, FN) ((VAL) |= (1 << (FN * 4))) argument
644 #define QLC_DEV_SET_QSCNT_RDY(VAL, FN) ((VAL) |= (2 << (FN * 4))) argument
645 #define QLC_DEV_CLR_RST_QSCNT(VAL, FN) ((VAL) &= ~(3 << (FN * 4))) argument
647 #define QLC_DEV_GET_DRV(VAL, FN) (0xf & ((VAL) >> (FN * 4))) argument
648 #define QLC_DEV_SET_DRV(VAL, FN) ((VAL) << (FN * 4)) argument
/drivers/gpu/drm/amd/display/dc/hubbub/dcn301/
A Ddcn301_hubbub.c36 #undef FN
37 #define FN(reg_name, field_name) \ macro
46 #undef FN
47 #define FN(reg_name, field_name) \ macro
/drivers/gpu/drm/amd/display/dc/hubbub/dcn201/
A Ddcn201_hubbub.c39 #undef FN
40 #define FN(reg_name, field_name) \ macro
49 #undef FN
50 #define FN(reg_name, field_name) \ macro
/drivers/gpu/drm/amd/display/dc/hwss/dcn301/
A Ddcn301_hwseq.c38 #undef FN
39 #define FN(reg_name, field_name) \ macro
/drivers/gpu/drm/amd/display/dc/hwss/dcn303/
A Ddcn303_hwseq.c41 #undef FN
42 #define FN(reg_name, field_name) \ macro
/drivers/gpu/drm/amd/display/dc/mmhubbub/dcn35/
A Ddcn35_mmhubbub.c36 #undef FN
37 #define FN(reg_name, field_name) \ macro
/drivers/gpu/drm/amd/display/dc/opp/dcn35/
A Ddcn35_opp.c32 #undef FN
33 #define FN(reg_name, field_name) \ macro
/drivers/gpu/drm/amd/display/dc/dwb/dcn35/
A Ddcn35_dwb.c33 #undef FN
34 #define FN(reg_name, field_name) \ macro
/drivers/gpu/drm/amd/display/dc/bios/
A Dbios_parser_helper.c53 #undef FN
54 #define FN(reg_name, field_name) \ macro
/drivers/gpu/drm/amd/display/dc/dcn201/
A Ddcn201_opp.c33 #undef FN
34 #define FN(reg_name, field_name) \ macro
/drivers/gpu/drm/amd/display/dc/dccg/dcn301/
A Ddcn301_dccg.c36 #undef FN
37 #define FN(reg_name, field_name) \ macro
/drivers/gpu/drm/amd/display/dc/dccg/dcn201/
A Ddcn201_dccg.c37 #undef FN
38 #define FN(reg_name, field_name) \ macro
/drivers/gpu/drm/amd/display/dc/dcn20/
A Ddcn20_vmid.c37 #undef FN
38 #define FN(reg_name, field_name) \ macro
/drivers/gpu/drm/amd/display/dc/dcn10/
A Ddcn10_ipp.c33 #undef FN
34 #define FN(reg_name, field_name) \ macro
/drivers/gpu/drm/amd/display/dc/dcn31/
A Ddcn31_afmt.c39 #undef FN
40 #define FN(reg_name, field_name) \ macro
A Ddcn31_vpg.c38 #undef FN
39 #define FN(reg_name, field_name) \ macro
A Ddcn31_apg.c38 #undef FN
39 #define FN(reg_name, field_name) \ macro
/drivers/gpu/drm/amd/display/dc/hpo/dcn32/
A Ddcn32_hpo_dp_link_encoder.c37 #undef FN
38 #define FN(reg_name, field_name) \ macro
/drivers/gpu/drm/amd/display/dc/dccg/dcn21/
A Ddcn21_dccg.c37 #undef FN
38 #define FN(reg_name, field_name) \ macro
/drivers/gpu/drm/amd/display/dc/dccg/dcn30/
A Ddcn30_dccg.c36 #undef FN
37 #define FN(reg_name, field_name) \ macro
/drivers/gpu/drm/amd/display/dc/dsc/dcn35/
A Ddcn35_dsc.c51 #undef FN
52 #define FN(reg_name, field_name) \ macro
/drivers/gpu/drm/amd/display/dc/gpio/
A Dhw_generic.c38 #undef FN
39 #define FN(reg_name, field_name) \ macro

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