Searched refs:GEN6_BSD_RING_BASE (Results 1 – 7 of 7) sorted by relevance
| /drivers/gpu/drm/i915/gt/ |
| A D | intel_engine_regs.h | 38 #define GEN6_VBSYNC (RING_SYNC_0(GEN6_BSD_RING_BASE))
39 #define GEN6_VRSYNC (RING_SYNC_1(GEN6_BSD_RING_BASE))
40 #define GEN6_VVESYNC (RING_SYNC_2(GEN6_BSD_RING_BASE))
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| A D | intel_ring_submission.c | 1054 intel_uncore_write_fw(uncore, RING_PSMI_CTL(GEN6_BSD_RING_BASE), in gen6_bsd_submit_request()
1062 RING_PSMI_CTL(GEN6_BSD_RING_BASE), in gen6_bsd_submit_request()
1075 intel_uncore_write_fw(uncore, RING_PSMI_CTL(GEN6_BSD_RING_BASE), in gen6_bsd_submit_request()
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| A D | intel_rc6.c | 461 (intel_uncore_read(uncore, PWRCTX_MAXCNT(GEN6_BSD_RING_BASE)) & IDLE_TIME_MASK) > 1 && in bxt_check_bios_rc6_setup()
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| A D | intel_engine_cs.c | 139 { .graphics_ver = 6, .base = GEN6_BSD_RING_BASE },
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| /drivers/gpu/drm/i915/ |
| A D | intel_gvt_mmio_table.c | 53 MMIO_F(prefix(GEN6_BSD_RING_BASE), s); \
1257 MMIO_F(GEN8_RING_CS_GPR(GEN6_BSD_RING_BASE, 0), 0x40); in iterate_bxt_mmio()
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| A D | i915_reg.h | 245 #define GEN6_BSD_RING_BASE 0x12000 macro
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| /drivers/gpu/drm/i915/gvt/ |
| A D | handlers.c | 2184 MMIO_F(prefix(GEN6_BSD_RING_BASE), s, f, am, rm, d, r, w); \
2810 MMIO_F(GEN8_RING_CS_GPR(GEN6_BSD_RING_BASE, 0), 0x40, F_CMD_ACCESS, in init_bxt_mmio_info()
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