Searched refs:GEN7_MISCCPCTL (Results 1 – 8 of 8) sorted by relevance
| /drivers/gpu/drm/i915/ |
| A D | intel_clock_gating.c | 331 misccpctl = intel_uncore_rmw(&i915->uncore, GEN7_MISCCPCTL, in gen8_set_l3sqc_credits()
346 intel_uncore_write(&i915->uncore, GEN7_MISCCPCTL, misccpctl); in gen8_set_l3sqc_credits()
409 intel_uncore_rmw(&i915->uncore, GEN7_MISCCPCTL, in skl_init_clock_gating()
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| A D | vlv_suspend.c | 149 s->misccpctl = intel_uncore_read(uncore, GEN7_MISCCPCTL); in vlv_save_gunit_s0ix_state()
234 intel_uncore_write(uncore, GEN7_MISCCPCTL, s->misccpctl); in vlv_restore_gunit_s0ix_state()
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| A D | i915_irq.c | 176 misccpctl = intel_uncore_rmw(&dev_priv->uncore, GEN7_MISCCPCTL, in ivb_parity_work()
178 intel_uncore_posting_read(&dev_priv->uncore, GEN7_MISCCPCTL); in ivb_parity_work()
220 intel_uncore_write(&dev_priv->uncore, GEN7_MISCCPCTL, misccpctl); in ivb_parity_work()
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| A D | i915_perf.c | 2396 intel_uncore_rmw(uncore, GEN7_MISCCPCTL, in hsw_enable_metric_set()
2412 intel_uncore_rmw(uncore, GEN7_MISCCPCTL, in hsw_disable_metric_set()
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| A D | intel_gvt_mmio_table.c | 816 MMIO_D(GEN7_MISCCPCTL); in iterate_bdw_plus_mmio()
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| /drivers/gpu/drm/i915/gt/uc/ |
| A D | intel_guc_fw.c | 43 intel_uncore_rmw(uncore, GEN7_MISCCPCTL, 0, in guc_prepare_xfer()
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| /drivers/gpu/drm/i915/gt/ |
| A D | intel_workarounds.c | 1501 wa_add(wal, GEN7_MISCCPCTL, GEN12_DOP_CLOCK_GATE_RENDER_ENABLE, in gen12_gt_workarounds_init()
1544 wa_add(wal, GEN7_MISCCPCTL, GEN12_DOP_CLOCK_GATE_RENDER_ENABLE, in dg2_gt_workarounds_init()
1577 wa_write_clr(wal, GEN7_MISCCPCTL, GEN12_DOP_CLOCK_GATE_RENDER_ENABLE); in xelpg_gt_workarounds_init()
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| A D | intel_gt_regs.h | 706 #define GEN7_MISCCPCTL _MMIO(0x9424) macro
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