Searched refs:GEN8_MASTER_IRQ (Results 1 – 5 of 5) sorted by relevance
| /drivers/gpu/drm/i915/ |
| A D | i915_irq.c | 344 master_ctl = intel_uncore_read(&dev_priv->uncore, GEN8_MASTER_IRQ) & ~GEN8_MASTER_IRQ_CONTROL; in cherryview_irq_handler()
365 intel_uncore_write(&dev_priv->uncore, GEN8_MASTER_IRQ, 0); in cherryview_irq_handler()
393 intel_uncore_write(&dev_priv->uncore, GEN8_MASTER_IRQ, GEN8_MASTER_IRQ_CONTROL); in cherryview_irq_handler()
492 raw_reg_write(regs, GEN8_MASTER_IRQ, 0); in gen8_master_intr_disable()
500 return raw_reg_read(regs, GEN8_MASTER_IRQ); in gen8_master_intr_disable()
505 raw_reg_write(regs, GEN8_MASTER_IRQ, GEN8_MASTER_IRQ_CONTROL); in gen8_master_intr_enable()
747 intel_uncore_write(uncore, GEN8_MASTER_IRQ, 0); in cherryview_irq_reset()
748 intel_uncore_posting_read(&dev_priv->uncore, GEN8_MASTER_IRQ); in cherryview_irq_reset()
831 intel_uncore_write(&dev_priv->uncore, GEN8_MASTER_IRQ, GEN8_MASTER_IRQ_CONTROL); in cherryview_irq_postinstall()
832 intel_uncore_posting_read(&dev_priv->uncore, GEN8_MASTER_IRQ); in cherryview_irq_postinstall()
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| A D | i915_reg.h | 860 #define GEN8_MASTER_IRQ _MMIO(0x44200) macro
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| A D | intel_gvt_mmio_table.c | 784 MMIO_D(GEN8_MASTER_IRQ); in iterate_bdw_plus_mmio()
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| /drivers/gpu/drm/i915/gvt/ |
| A D | interrupt.c | 514 DEFINE_GVT_GEN8_INTEL_GVT_IRQ_INFO(master, GEN8_MASTER_IRQ);
528 if (!(vgpu_vreg(vgpu, i915_mmio_reg_offset(GEN8_MASTER_IRQ)) & in gen8_check_pending_irq()
545 if (vgpu_vreg(vgpu, i915_mmio_reg_offset(GEN8_MASTER_IRQ)) in gen8_check_pending_irq()
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| A D | handlers.c | 2523 MMIO_DH(GEN8_MASTER_IRQ, D_BDW_PLUS, NULL, in init_bdw_mmio_info()
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