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Searched refs:GET_REG_OFFSET (Results 1 – 2 of 2) sorted by relevance

/drivers/clk/renesas/
A Drzg2l-cpg.c65 #define GET_REG_OFFSET(val) ((val >> 20) & 0xfff) macro
182 u32 off = GET_REG_OFFSET(conf); in rzg2l_cpg_wait_clk_update_done()
195 u32 off = GET_REG_OFFSET(clk_hw_data->conf); in rzg2l_cpg_sd_clk_mux_notifier()
239 u32 off = GET_REG_OFFSET(clk_hw_data->conf); in rzg3s_cpg_div_clk_notifier()
303 val = readl(priv->base + GET_REG_OFFSET(clk_hw_data->conf)); in rzg3s_div_clk_recalc_rate()
329 u32 off = GET_REG_OFFSET(clk_hw_data->conf); in rzg3s_div_clk_set_rate()
431 base + GET_REG_OFFSET(core->conf), in rzg2l_cpg_div_clk_register()
440 base + GET_REG_OFFSET(core->conf), in rzg2l_cpg_div_clk_register()
460 priv->base + GET_REG_OFFSET(core->conf), in rzg2l_cpg_mux_clk_register()
475 u32 off = GET_REG_OFFSET(clk_hw_data->conf); in rzg2l_cpg_sd_clk_mux_set_parent()
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A Dr9a09g077-cpg.c42 #define GET_REG_OFFSET(val) FIELD_GET(OFFSET_MASK, val) macro
228 u32 offset = GET_REG_OFFSET(core->conf); in r9a09g077_cpg_clk_register()

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