Home
last modified time | relevance | path

Searched refs:GLINT_DYN_CTL (Results 1 – 10 of 10) sorted by relevance

/drivers/infiniband/hw/irdma/
A Dicrdma_hw.h29 #define GLINT_DYN_CTL(_INT) (0x00160000 + ((_INT) * 4)) /* _i=0...2047 */ macro
A Dicrdma_hw.c18 GLINT_DYN_CTL(0),
/drivers/net/ethernet/intel/ice/
A Dice_sriov.c77 wr32(&pf->hw, GLINT_DYN_CTL(i), GLINT_DYN_CTL_CLEARPBA_M); in ice_free_vf_res()
749 wr32(hw, GLINT_DYN_CTL(pf->oicr_irq.index), in ice_ena_vfs()
A Dice_hw_autogen.h193 #define GLINT_DYN_CTL(_INT) (0x00160000 + ((_INT) * 4)) macro
A Dice.h728 wr32(hw, GLINT_DYN_CTL(vector), val); in ice_irq_dynamic_ena()
A Dice_txrx.c1538 wr32(&vsi->back->hw, GLINT_DYN_CTL(q_vector->reg_idx), itr_val); in ice_enable_interrupt()
1567 wr32(&vsi->back->hw, GLINT_DYN_CTL(q_vector->reg_idx), in ice_set_wb_on_itr()
A Dice_base.c1114 wr32(hw, GLINT_DYN_CTL(q_vector->reg_idx), in ice_trigger_sw_intr()
A Dice_xsk.c104 wr32(hw, GLINT_DYN_CTL(q_vector->reg_idx), 0); in ice_qvec_dis_irq()
A Dice_main.c3151 wr32(hw, GLINT_DYN_CTL(pf->oicr_irq.index), in ice_ena_misc_vector()
3157 wr32(hw, GLINT_DYN_CTL(pf->ll_ts_irq.index + pf_intr_start_offset), in ice_ena_misc_vector()
3190 wr32(hw, GLINT_DYN_CTL(pf->ll_ts_irq.index + pf_intr_start_offset), in ice_ll_ts_intr()
7267 wr32(hw, GLINT_DYN_CTL(vsi->q_vectors[i]->reg_idx), 0); in ice_vsi_dis_irq()
8261 intr = rd32(hw, GLINT_DYN_CTL(tx_ring->q_vector->reg_idx)); in ice_tx_timeout()
A Dice_ethtool.c1374 wr32(&pf->hw, GLINT_DYN_CTL(pf->oicr_irq.index), in ice_intr_test()

Completed in 58 milliseconds