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Searched refs:GMBUS0 (Results 1 – 4 of 4) sorted by relevance

/drivers/gpu/drm/i915/display/
A Dintel_gmbus.c212 intel_de_write(display, GMBUS0(display), 0); in intel_gmbus_reset()
451 intel_de_write_fw(display, GMBUS0(display), in gmbus_xfer_read_chunk()
476 intel_de_write_fw(display, GMBUS0(display), gmbus0_reg); in gmbus_xfer_read_chunk()
640 intel_de_write_fw(display, GMBUS0(display), gmbus0_source | bus->reg0); in do_gmbus_xfer()
680 intel_de_write_fw(display, GMBUS0(display), 0); in do_gmbus_xfer()
712 intel_de_write_fw(display, GMBUS0(display), 0); in do_gmbus_xfer()
737 intel_de_write_fw(display, GMBUS0(display), 0); in do_gmbus_xfer()
A Dintel_gmbus_regs.h30 #define GMBUS0(__display) _MMIO(__GMBUS_MMIO_BASE(__display) + 0x5100) macro
/drivers/gpu/drm/gma500/
A Dintel_gmbus.c79 GMBUS_REG_WRITE(GMBUS0, 0); in gma_intel_i2c_reset()
262 GMBUS_REG_WRITE(GMBUS0 + reg_offset, bus->reg0); in gmbus_xfer()
345 GMBUS_REG_WRITE(GMBUS0 + reg_offset, 0); in gmbus_xfer()
351 GMBUS_REG_WRITE(GMBUS0 + reg_offset, 0); in gmbus_xfer()
A Dpsb_intel_reg.h34 #define GMBUS0 0x5100 /* clock/port select */ macro

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