Searched refs:GRL_CFG3 (Results 1 – 2 of 2) sorted by relevance
| /drivers/gpu/drm/mediatek/ | ||
| A D | mtk_hdmi_regs.h | 111 #define GRL_CFG3 0x30 macro |
| A D | mtk_hdmi.c | 235 regmap_clear_bits(hdmi->regs, GRL_CFG3, CFG3_CONTROL_PACKET_DELAY); in mtk_hdmi_hw_reset() |
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